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_____________________________________________ maxim integrated products 1 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxims website at www.maxim-ic.com. ds3 3 x 1 1 de m o k it ge ne ra l de sc ript ion the ds33x11 demo kit (dk) is an easy-to-use evaluation board for the ds33x11 ethernet-over-pdh device. the demo kit contains an option for either t3/e3 or t1/e1 serial links. all pdh links are complete with line interface, transformers, and network connections. maxims chipview software is provided with the demo kit, giving point-and-click access to configuration a nd status registers from a windows ? -based pc. on-board leds indicate receive loss-of-signal, queue overflow, ethernet link, tx/rx, and interrupt status. windows is a registered trademark of microsoft corp. orde ring i nform a t ion part type DS33X11DK demo card, t3/e3, t1/e1 de m o k it cont e nt s DS33X11DK main board cd-rom includes: chipview software and manual DS33X11DK data sheet configuration files fe a t ure s ? demonstrates key functions of ds33x11 ethernet transport chipset ? includes ds26521 t1/e1 sct, ds3170 t3/e3 sct, transformers, bnc, and rj48 network connectors and termination ? includes ethernet phy supporting 10/100 and gigabit modes ? provides support for hardware and software modes ? on-board mmc2107 processor and chipview software provide point-and-click access to the ds33x11, ds26528, ds3170, and phy registers ? all ds33x11 interface pins are easily accessible for external data source/sink ? leds for loss-of-signal, ethernet link, tx/rx, and interrupt status ? easy-to-read silkscreen labels identify the signals associated with all connectors, jumpers, and leds de m o k it boa rd rev: 030508 downloaded from: http:///
___________________________________________________ ____________________________________ ds3 3 x 1 1 dk rev: 030508 2 of 39 t a ble of cont e nt s 1. system fl oorplan ...................................................................................................... 4 2. pcb er rata..................................................................................................................... 4 3. file lo cations .............................................................................................................. 5 4. basic op eration........................................................................................................... 6 4.1 p owering u p the d emo k it .......................................................................................................... 6 4.1.1 general ........................................................................................................................ .......................... 6 4.2 b asic ds33x11 i nitialization ...................................................................................................... 6 4.2.1 additional configur ation for ds33x11 ........................................................................................... ........ 7 4.3 m onitor and c apture e thernet t raffic ................................................................................... 7 5. leds, configuration switches, jumpers, and connectors ....................... 7 6. register access ........................................................................................................ 10 6.1 a ddress m ap .............................................................................................................................. 10 6.2 c ontrol t hrough e xternal p rocessor ................................................................................. 10 6.3 spi m ode .................................................................................................................................... 10 6.4 mac and phy r egisters ........................................................................................................... 10 7. additional inform ation/reso urces .................................................................. 11 7.1 ds33x11 i nformation ............................................................................................................... 11 7.2 DS33X11DK i nformation .......................................................................................................... 11 7.3 t echnical s upport .................................................................................................................... 11 8. componen t li st .......................................................................................................... 12 9. schema tics .................................................................................................................. 19 downloaded from: http:///
___________________________________________________ ____________________________________ ds3 3 x 1 1 dk rev: 030508 3 of 39 list of figure s figure 1-1. ds33x11 system floorplan........................................................................................... ........................... 4 list of t a ble s table 3-1. f ile details........................................................................................................ .......................................... 5 table 5-1. main boar d pcb configuration ........................................................................................ .......................... 7 table 6-1. overview of da ughter card address map............................................................................... ................. 10 table 8-1. co mponent list ...................................................................................................... .................................. 12 downloaded from: http:///
___________________________________________________ ____________________________________ ds3 3 x 1 1 dk rev: 030508 4 of 39 1 . syst e m floorpla n figure 1-1. ds33x11 system floorplan 2 . pcb erra t a DS33X11DK01a0 board errata: ? sstl_testi pin should have been pulled high (done via rework). ? needs a reset controller (added by rework). ? silkscreen at jp21 was bac kwards (fixed by swa pping oscillators to make silkscreen correct). ? three-pin bias jumpers are missing +- silkscreen. DS33X11DK02a0 board errata: ? there are no errata for DS33X11DK02a0. microprocessor 10/100/1000 ethernet phy and magnetics leds serial port (57600-8-n-1) ds33x11 ds3170 t3/e3 transformer and network connections (t3/e3) spi config jumpers jumpers for ethernet config ddr test points fet switch + test points ds26521 t1/e1 transformer and network connections (t1/e1) usb driver configuration clock select, phy config power (5v) ds33x11 demo kit downloaded from: http:///
___________________________________________________ ____________________________________ ds3 3 x 1 1 dk rev: 030508 5 of 39 3 . file loc a t ions this demo kit relies upon several supporting files, whic h are provided on the cd-rom and are available as a zip file from the maxim website at www.maxim-ic.com/DS33X11DK . all locations are given relative to the top director y of the cd-rom/zip file. t he ds33x11, ds3170, and ds26521 register definition files and configuration files are listed in table 3-1 . table 3-1. file details file name file usage .\ds33x11_cfg_demo_gui\_ds33x161_globalmicroport.def top-level definition file to select in chipviews register mode. this file will autoload the remaining definition files for the ds33x11. (note that the wan files still need to be loaded (either ds).) .\ds33x11_cfg_demo_gui\ds33x161_lan.def .\ds33x11_cfg_demo_gui\ds33x161_bufferman.def .\ds33x11_cfg_demo_gui\ds33x161_encapdecap.def .\ds33x11_cfg_demo_gui\ds33x161_vcat.def .\ds33x11_cfg_demo_gui\ds33x161_serialport.def ds33x11 dependent files. these are called by the _ds33x161_globalmicroport.def file listed above. .\ds33x11_cfg_demo_gui\ds33x11_lan_t3wan_ext.mfg file for manually configuring the ds33x11 to interface with the ds3170. .\ds33x11_cfg_demo_gui\ds33x11_lan_t1wan_ext.mfg file for manually configuring the ds33x11 to interface with the ds26521. .\ds33x11_cfg_demo_gui\x11_wan1.eset gui interface for loading settings when running the xchip plug-in (launched from the tools menu of the chipview program). .\ds33x11_cfg_demo_gui\te3_ds3170\ds3170_evbrd.def top-level definition file to select the ds3170 t3/e3 transceiver. this file will autoload the remaining definition files for the ds3170. .\ds33x11_cfg_demo_gui\te3_ds3170\misc1_p1.def .\ds33x11_cfg_demo_gui\te3_ds3 170\feac_frac_p1.def .\ds33x11_cfg_demo_gui\te3_d s3170\ttrace_p1.def .\ds33x11_cfg_demo_gui\te3_ds3170\ds3_p1.def .\ds33x11_cfg_demo_gui\te3_ds3170\e3751_p1.def .\ds33x11_cfg_demo_gui\te3_ds3170\e3832_p1.def .\ds33x11_cfg_demo_gui\te3_ds3170\port1.def ds3170 dependent files. these are called by the ds3170_evbrd.def file listed above. .\ds33x11_cfg_demo_gui\te3_ds3170\70_t 3_sct_needscoaxlb.mfg configuration file for t3 mode. .\ds33x11_cfg_demo_gui\ds2652 1\ds26521_global_t1.def top-level definition file to select the ds26521 t1/e1 transceiver. this file will autoload the remaining definition files for the ds26521. .\ds33x11_cfg_demo_gui\ds26521\ds26521_1_liu_bert.def .\ds33x11_cfg_demo_gui\ds26521\ds26521_1_t1.def ds26521dependent files. these are called by ds26521_global_t1.def file listed above. .\ds33x11_cfg_demo_gui\ds26521\t1_config.mfg configuration file for t1 mode. downloaded from: http:///
___________________________________________________ ____________________________________ ds3 3 x 1 1 dk rev: 030508 6 of 39 4 . ba sic ope ra t ion note: in the following sections, software-relat ed items are identified by bolding. text in bold refers to items directly from the demo kit (dk) software. text in bold and underlined refers to items from t he windows operating system. 4 .1 pow e ring u p t he de m o k it ? connect the pcb power jack to the wall adapter. ? connect the rs232 serial cable or usb cable between the host pc and the demo kit. ? verify that the jumpers are configured as described in table 5-1 . 4 .1 .1 ge ne ra l ? upon power-up the power leds (ds33, ds34, ds35 green) will be lit. transceiver rlos + ltc led (ds38, ds37 red) will be lit. ? phy link led (ds07 green) should be lit if the ethernet is connected. ensure that the jp15 (ds33x11 refclk) setting matches link mode. for gigabit mode jp15 should be set to drive refclk with 125mhz. for 10/100mb modes, refclk should be driven with 25mhz. following are several basic system initializations. 4 .2 ba sic ds3 3 x 1 1 i nit ia liza t ion this section covers three basic methods for configuring the ds33x11. 1) device driver-based configurat ion. if the pins j50.1+j50.2 are unj umpered, the device driver will auto configure the ds33x11 upon power-up. this enables traffic to pass from the ethernet port to the serial port. refer to the device driver docu mentation for further details. 2) register-based conf igurationt1 mode a) install jumper j50.1+j50.2 to disable device drivers, and then reset the board. ensure that j50.9+j50.10 is not installed. b) launch chipview.exe and select register view . c) when prompted for a definition file, pick the file named _ds33x161_globalmicroport.def , six additional definition files will load. d) go to the file menu and select file definition file . when prompted, select ds26521_global_t1.def . e) go to the file menu and select file memory config file load .mfg file. when prompted, select the file named ds33x11_lan_t1wan_ext.mfg . f) go to the file menu and select file memory config file load .mfg file. when prompted, select the file named t1_config.mfg . 3) register-based conf igurationt3 mode a) install jumper j50.1+j50.2 to disable devic e drivers, and then reset the board. ensure that j50.9+j50.10 is installed. b) launch chipview.exe and select register view . c) when prompted for a definition file, pick the file named _ds33x161_globalmicroport.def . six additional definition files will load. d) go to the file menu and select file definition file . when prompted select ds3170_evbrd.def . e) go to the file menu and select file memory config file load .mfg file . when prompted, select the file named ds33x11_lan_t3wan_ext.mfg . f) go to the file menu and select file memory config file load .mfg file . when prompted, select the file named 70_t3_sct_needscoaxlb.mfg . downloaded from: http:///
___________________________________________________ ____________________________________ ds3 3 x 1 1 dk rev: 030508 7 of 39 4 .2 .1 addit iona l configura t ion for ds3 3 x 1 1 ? using a patch or crossover cable, connect the ethernet connector to an ordinary pc or network test equipment. this should cause the link led to turn on. ? place a loopback connector at the t1e1 network si de; rlos and ltc leds should go out (ds38, ds37). ? at this point any packets sent to the ds33x11 are echoed back. incoming packets (i.e., ping) should cause the activity led to blink. ? note that chipview.exe display settings can be changed using the options settings menu. 4 .3 m onit or a nd ca pt ure et he rne t t ra ffic ? although ping is mentioned, it is not recommended. the ping command goes through the computers tcpip stack and sometimes will not be sent out the pcs network connector (i.e., if the pcs arp cache is out of date). additionally, ping requires two pcs, as a pc with only one adapter cannot ping itself (a local ping gets sent to local hos t instead of out t he connector). however, ping is still a valuable test once the prototyping stage is complete. ? generation and capture of arbitrary (raw) packets can be accomplished using commview. a time-limited demo is available at www.ta mos.com/products/commview. ? wireshark is an excellent (and free) packet capture utility. download is available at ww w.wireshark.org. ? adding additional ethernet ports to a pc is rather si mple when a usb-to-ethernet adapter is used. this allows for end-to-end testing using a single pc. w hen using two adapters the pc has a different ip address for each adapter. test equipment allows sele ction of either adapter. operating -system-based network traffic is sent out of the default adapter; usually this is the adapter that has recently had connection to a live network. 5 . leds, configura t ion sw it c he s, j um pe rs, a nd conne c t ors the DS33X11DK has several configuration switches, oscillators, and jumpers. table 5-1 provides a description of these signals, given in order of appe arance on the pc board, from top to bottom and then left to right (with the board held so that the rs232 and usb connectors are on the right-hand side of the board). table 5-1. main boar d pcb configuration silkscreen reference function basic setting schematic page description j44+j45 wan network connection 40 t3/e3 jumpers for network interface. used with 2-pin coax adapter (provided). j47 wan network connection 42 t1/e1 rj45 connector for network interface. j46 power jack 28 system power. always connected to 5v wall adapter (provided). j43 usb 32 usb interface. j51 rs232 db9 connector 32 rs232 db9 connector, operates in ascii mode at 57.6k,8,n,1. ds33, ds34, ds35 led on 35 power ok leds for 1.8v, 2.5v, and 3.3v power supplies. all three leds must be lit. j48+j49 test points not used 42 address data bus test points. see section 6.2 regarding control by external processor. silkscreen for these signals is provided a few inches to the left of the signals. yb08 (pcb solder side) oscillator 40 oscillator for t3/e3 mclk. silkscreen and target are provided on top side of pcb. ds36 led user setting (off) 40 ds3170 general-purpose i/o led. not configured by ini files. downloaded from: http:///
___________________________________________________ ____________________________________ ds3 3 x 1 1 dk rev: 030508 8 of 39 silkscreen reference function basic setting schematic page description j50 configuration ? p1+p2: jumper to enable drivers (remove to disable drivers). ? p3+p4: jumper to enable interrupt handlers (this jumper is only valid when drivers are enabled). ? p5+p6: jumper to set for looptimewan txclock driven by rxclock. remove to set for sour ce time wan txclock driv en by oscillator (this jumper is only valid when drivers are enabled). ? p7+p8: reserved, currently has no impact on system. ? p9+p10: jumper to enable t3/e3 mode, remove jumper to set t1/e1 mode. this jumper controls fet switches u22 and ub34. j52 fpga jtag not used 34 jtag test points for lattice fpga. not shared with other devices. j53 test point 41 ds26521 test points (see silkscreen at top of board). tclk, refclkio, tsysclk, tsig, rsysclk, tssyncio, tser, rm_rfsync, rsig. ds37Cds38 ds26521 leds 41 ds26521 ltc and rlos pins. should be off when configured and connected to another device. check tclk setting if leds flicker on/off. jp16 bias phy manmdix jumper p1+2 (high) 37 default mdix setting. p1+2 phy is set to straight mode; p2+3 phy is in crossover mode. jp17 bias phy multien jumper p1+2 (high) 37 phy advertisement setting. p2+3 selects multiple node priority (switch or hub). p1+2 selects single node priority (nic). jp18 bias phy mdixen jumper p2+3 (low) 37 p2+3 enables pair swap mode. p1+3 disables pair swap mode. jp19 bias phy macclken jumper p2+3 (low) 37 p2+3 phy clock to mac output is enabled. p1+2 phy clock to mac output is disabled. jp20 phy clock in jumper p1+2 (high) 38 phy clock input. alwa ys set for p1+2, driving phy with 25mhz oscillator. setting p2+3 would drive with ds33x11 refclk and work in mii mode, but not in gmii mode (this jumper is removed in DS33X11DK02a0). yb09 (pcb solder side) 125mhz oscillator not populated 24 125mhz oscillator. can be jumpered to ds33x11 refclk. this oscillator is not populated. in gmii mode refclk is driven by phy clock out (using jumper jp101). yb10 (pcb solder side) 25mhz oscillator 24 25mhz oscillator. used for phy clock in (mii+gmii). used for ds33x11 refclk in mii mode. yb11 125mhz oscillator 24 ds33x11 sysclock. jb05+jb04 (pcb solder side) connector/test points 36 test points for interface signals between phy and ds33x11. j54 ds33x11 test points 22 test points for rgclk, rsync, rdat, tgclk, tsync, tdat. jp15, jp101 ds33x11 refclk jp15.1+jp15.2, jp101 installed 24 jp15 selects ds33x11 refclk source: ? jp15.1+2 to select phy macclkout (gmii mode). ? jp15.2+3 to select 25mhz oscillator (mii mode). jp101 should always be installed as it connects macclkout to jp15.1. j2 ethernet connection 38 rj45 ethernet connector. used in 10/100 and gigabit modes. downloaded from: http:///
___________________________________________________ ____________________________________ ds3 3 x 1 1 dk rev: 030508 9 of 39 silkscreen reference function basic setting schematic page description jp26 bias phy anen jumper p2+3 (high) 38 jumper p2+3 to enable auto negotiation. jp24 bias phy duplex jumper p2+3 (high) 38 jumper p2+3 to enable full duplex. jumper p1.2 to force half duplex. jp27+jp26 bias phy speed1 + speed0 jumper p1+2 (low) p1+2 (low) 38 if auto negotiation is enabled, this setting advertises capability for 10/100/1000 speeds. if auto negotiation is disabled, this setting forces 10mb mode. jp25 bias phy nonieee jumper p2+3 (high) 38 jumper p2+3 to ena ble ieee-compliant operation. ds41 led duplex 36 led is on in full-duplex mode. ds46+42 ds47+43 ds48+45 led link speed 1 of the 6 should be lit (when linked) 36 led to indicate link speed1000mbps, 100mbps, or 10mbps. only one of the six leds should be lit. see the jp15+jp101 description for setting in gmii vs. mii mode. ds44+39 led activity 36 flashes for phy tx-rx activity. j57 jtag jumpered p1+3 p7+9 27 jtag for ds33x11, ds26521, and ds3170. ds33x11 can be isolated from ds26521 and ds3170. jumpers on p1+3 and p7+9 prevent the devices from entering jtag mode. jp21 jumper p2+3 for 1.544mhz. yb12, yb13 ds26521 mclk select jumpered p2+3 42 jumper p1+2 for 2.048mhz. j55.1Cj55.8 ds33x11 spi test points jumpered p1+2 p3+4 p5+6 p7+8 27 spi test points for ds33x11. the first four jumpers are installed to connect the ds33x11 to the processor spi port (miso, mosi, sclk, cs). j55.9+j55.10 ds33x11 bias spi swap jumpered p9+10 (high) 27 processor default is to transfer msb first. jumper p9+10 to match this setting. j55.11Cj55.14 ds33x11 bias spi cpha bias spi cpol both jumpered 27 processor default is to have normal phase and idle high. see the spi section (section 6.3 ) for further detail. ds40 led 27 ds33x11 interrupt led. jp22 ds33x11 bias rmii jumpered p1+2 (low) 27 jumper p1+2 for mii mode. jumper p2+3 for rmii mode (rmii mode is not available in this demo kit). jp28 ds33x11 bias dce jumpered p1+2 (low) 27 jumper p1+2 for dte mode. jumper p2+3 for dce mode. (this demo kit does not support dce mode.) j58 once not used 32 once debug connector for mmc2107 microcontroller. jb06 (pcb solder side) flash vpp not used 32 for programming flash memory. ds50 led on 32 led to display kit status. should be on. downloaded from: http:///
___________________________________________________ ____________________________________ ds3 3 x 1 1 dk rev: 030508 10 of 39 6 . re gist e r ac c e ss 6 .1 addre ss m a p the external device address space begins at 0x81000000. all offsets given in table 6-1 are relative to this offset. table 6-1. overview of daughter card address map offset device description 0x0000 to 0x0087 fpga processor board identification. 0x1000 to 0x1fff reserved. 0x4000 to 0x5fff ds26521 ds26521 t1/e1 device. uses cs_x2. 0x8000 to 0x9fff ds3170 ds3170 t3/e3 device. uses cs_x4. all device registers can be easily m odified using the chipview host-based user-interface software with the definition files previously mentioned. 6 .2 cont rol t hrough ex t e rna l proc e ssor the demo kit is intended to be controlled using the on-boar d microcontroller and a host pc. however, the demo kit has jumper points to allow it to be controlled by an external processor. the ds33x11 can be controlled in spi mode by attaching to the signals at j55 pins 2, 4, 6, 8. the transceivers (ds26521 and ds3170) can be controlled by jumpering j49.12+14. doing so pulls up the tristate _bus signal and places the fpga in a high-impedance mode (see the address map section). 6 .3 spi m ode the ds33x11 uses spi mode and is addressed differently than devices that use a parallel address/data bus. the ds33x11 does not have an address offset. its base address starts at 0x00. table 5-1 details the default bias levels for spi configuration pins. to change these settings the pr ocessors spi settings must also change. the processor spi settings can be changed in chipviews terminal mode using the spisg s function. 6 .4 m ac a nd ph y re gist e rs the mac and phy are accessed indirectly. this process is automated by the indi rect register module. to load this module, first select the ds33x162 devic e driver demo plugin using the tools plugins menu. once the device driver demo loads, select the i ndirect register module from the tools indirect register menu. the first tab of the menu has a selection for the device bus mode. select spi mode when using the ds33x11. to test that the indirect regi ster section is working, try to reset the phy. select the phy tab, change the padd field to 00001 to select the phy at mdio address 1. in the data write field enter 00 00 80 00. click the write phy button. at this point the link led of the phy sh ould go out (and turn back on in a few seconds). downloaded from: http:///
___________________________________________________ ____________________________________ ds3 3 x 1 1 dk rev: 030508 11 of 39 7 . addit iona l i nform a t ion/re sourc e s 7 .1 ds3 3 x 1 1 i nform a t ion for more information about the ds33x11, refer to t he ds33x11 data sheet available on our website at www.maxim-ic.com/ds33x11 . 7 .2 ds3 3 x 1 1 dk i nform a t ion for more information about the DS33X11DK, including software downloads, refer to the DS33X11DK data sheet available on the our website at www.maxim-ic.com/DS33X11DK . 7 .3 t e c hnic a l support for additional technical support, go to www.maxim-ic.com/support . downloaded from: http:///
___________________________________________________ ____________________________________ ds3 3 x 1 1 dk rev: 030508 12 of 39 8 . com pone nt list table 8-1 shows the component list for the ds33x11 and ds33 x162 demo kits and resource cards. this bom contains the part listing for four boards. these b oards are the DS33X11DK, ds 33x162dk, dualphyrc, and gigphyrc. each reference designator is only used on ce. for example, u25 only appears on the DS33X11DK and is not used on any of the other boards. see table 5-1 . table 8-1. component list designation qty description supplier part c02, c22, c145, cb19, cb23, cb42, cb95, cb129, cb303, cb319, cb445, cb447, cb452, cb460, cb463 15 d case tant 470uf 6.3v 20% kem t491d477m006as reference designators shown on next row 231 0603 ceram 4.7uf 6.3v multilayer unk ecj-1vb0j475m c03, c08, c11, c14, c15, c16, c17, c21, c24, c29, c33, c45, c49, c51, c52, c91, c92, c96, c97, c 115, c119, c120, c122, c123, c129, c137, c138, c141, c142, c146, c149, c151, c153, c158, c258, c263, c265, cb01, cb04, cb06, cb09, cb13, cb16, cb17, cb21, cb24, cb26, cb27, cb28, cb36, cb37, cb41 , cb44, cb45, cb46, cb47, cb48, cb58, cb60, cb66, cb67, cb74, cb75, cb76, cb78, cb80, cb84, cb92, cb93, cb98, cb 99, cb100, cb104, cb107, cb114, cb115, cb116, cb118, cb123, cb125, cb126, cb137, cb138, cb1 41, cb144, cb151, cb155, cb158, cb163, cb164, cb166, cb170, cb171, cb172, cb179, cb181, cb183, cb185, cb186, cb1 88, cb189, cb191, cb192, cb193, cb195, cb197, cb198, cb201, cb204, cb209, cb215, cb218, cb221, cb222, cb227, cb2 29, cb230, cb231, cb234, cb235, cb239, cb243, cb249, cb251, cb255, cb258, cb263, cb264, cb267, cb270, cb271, cb2 73, cb276, cb277, cb278, cb284, cb287, cb293, cb294, cb297, cb298, cb302, cb304, cb306, cb307, cb320, cb322, cb3 27, cb328, cb341, cb343, cb344, cb345, cb347, cb348, cb351, cb352, cb353, cb357, cb358, cb364, cb365, cb366, cb3 67, cb369, cb370, cb371, cb375, cb376, cb379, cb380, cb388, cb392, cb393, cb395, cb396, cb399, cb400, cb401, cb4 04, cb405, cb406, cb407, cb408, cb409, cb415, cb416, cb423, cb424, cb425, cb427, cb431, cb436, cb438, cb441, cb4 42, cb446, cb449, cb453, cb454, cb462, cb467, cb760, cb766, cb768, cb777, cb779, cb789, cb790, cb791, cb792, cb7 93, cb795, cb798, cb802, cb804, cb805, cb807, cb808, cb810, cb812, cb813, cb815, cb816, cb817, cb818, cb824, cb827, cb856, cb857, cb859 reference designators shown on next row 114 l_0603 ceram .01uf 50v 10% x7r avx 06035c103kat c04, c05, c06, c07, c09, c10, c18, c20, c32, c37, c40, c41, c42, c50, c57, c70, c89, c98, c104, c113, c114, c118, c125, c133, c134, c136, c148, c150, c261, c266, cb03, cb11, cb14, cb20, cb30, cb34, cb52, cb55, cb61, cb69, cb71, cb73, cb83, cb103, cb109, cb112, cb119, cb120, cb128, cb139, cb150, cb157, cb161, cb167, cb173, cb187, cb194, cb205, cb206, cb207, cb213, cb216, cb217, cb2 19, cb223, cb224, cb225, cb228, cb240, cb256, cb259, cb261, cb275, cb285, cb295, cb300, cb308, cb332, cb350, cb3 54, cb359, cb361, cb381, cb385, cb391, cb398, cb402, cb413, cb414, cb419, cb428, cb432, cb435, cb439, cb443, cb4 44, cb448, cb451, cb466, cb468, cb761, cb765, cb770, cb771, cb772, cb776, cb794, cb803, cb806, cb811, cb819, cb823, cb853, cb855 c110, c112, cb86, cb87 4 l_0603 ceram 22pf 25v 5% npo avx 06033a220jat c156, c259, cb51, cb762, cb763, cb764, cb767, cb769, cb773, cb774, cb775, cb780, cb782, cb786, cb787, cb788 16 0603 ceram 0.1uf 16v 10% phycomp 06032r104k7b20d c25, c126, cb10, cb31, cb33, cb88, cb89, cb102, cb145, cb146, cb147, cb315, cb333, cb338, cb363, cb368, cb383, cb417, cb418, cb437 20 l_1206 ceram 10uf 10v 20% panasonic ecj-3yb1a106m c28, c31, c132, cb25, cb32, cb35, cb38, cb40, cb43, cb56, cb68, cb81, cb85, cb96, cb105, cb313, cb321, cb324, cb372, cb373, cb384, cb394, cb397, cb410, cb411, cb412, cb422, cb450 28 0603 ceram .1uf 16v 10% panasonic ecj-1vb1c104k c39, c44, c54, c55, c56, c60, c61, c64, c99, c100, c101, c102, c103, c105, c106, c107, c108, c109 18 1206 ceram 10uf 10v 20% panasonic ecj-3yb1a106m downloaded from: http:///
___________________________________________________ ____________________________________ ds3 3 x 1 1 dk rev: 030508 13 of 39 designation qty description supplier part c58, c63, c67, c69, c73, c76, c77, c86, c87, cb108, cb153, cb208, cb238, cb252, cb253, cb254 16 1206 ceram 0.1uf 25v 10% panasonic ecj-3vb1e104k c59, c62, c65, c66, c68, c71, c72, c75, c78, c79, c80, c81, c82, c83, c84, c85, c116 17 1206 ceram 560pf 50v 5% avxz 12065a561jat2a reference designators shown on next row (begins with c01) 226 l_0603 ceram .1uf 16v 20% x7r avx 0603yc104mat c01, c12, c13, c19, c23, c26, c27, c30, c34, c35, c36, c38, c43, c46, c47, c48, c53, c74, c88, c90, c93, c94, c95, c111, c117, c121, c124, c127, c128, c130, c131, c135, c139, c140, c143, c144, c147, c152, c154, c155, c157, c260, c262, c264, cb02, cb05, cb07, cb12, cb18, cb22, cb29, cb39, cb49, cb53, cb57, cb59, cb62, cb63, cb64, cb65, cb70, cb72, cb77, cb79, cb82, cb90, cb91, cb94, cb97, cb101, cb106, cb110, cb111, cb113, cb117, cb 121, cb122, cb124, cb130, cb131, cb132, cb133, cb134, cb135, cb1 36, cb140, cb142, cb148, cb149, cb152, cb154, cb156, cb159, cb160, cb162, cb165, cb168, cb169, cb174, cb175, cb1 76, cb177, cb178, cb180, cb182, cb184, cb190, cb196, cb199, cb200, cb202, cb203, cb210, cb211, cb212, cb214, cb2 20, cb226, cb232, cb233, cb236, cb237, cb241, cb242, cb244, cb245, cb246, cb247, cb248, cb250, cb257, cb260, cb2 62, cb266, cb268, cb269, cb272, cb274, cb280, cb282, cb283, cb286, cb288, cb289, cb296, cb299, cb301, cb305, cb3 09, cb310, cb311, cb312, cb314, cb316, cb317, cb318, cb323, cb325, cb326, cb329, cb330, cb331, cb334, cb335, cb3 36, cb337, cb339, cb340, cb342, cb346, cb349, cb355, cb356, cb360, cb362, cb374, cb377, cb378, cb382, cb386, cb3 87, cb389, cb390, cb403, cb420, cb421, cb426, cb430, cb433, cb434, cb440, cb455, cb456, cb457, cb458, cb459, cb4 61, cb464, cb465, cb469, cb470, cb757, cb758, cb759, cb778, cb781, cb783, cb784, cb785, cb796, cb797, cb799, cb8 00, cb801, cb809, cb814, cb820, cb821, cb822, cb825, cb826, cb828, cb829, cb852, cb854, cb858 cb08, cb15, cb54, cb127, cb143, cb279, cb281, cb290, cb291, cb292 10 l_d case tant 68uf 16v 20% panasonic ecs-t1cd686r cb265, cb429 2 l_1206 ceram 1uf 16v 10% panasonic ecj-3yb1c105k db01, db02, db03 3 schottky diode, 1 amp 40 volt international rectifier 10bq040 ds01, ds02, ds03, ds33, ds34, ds35, ds41, ds42, ds43, ds44, ds45, ds46, ds47, ds48, ds49, ds75, ds76, ds77, ds78, ds79, ds80, ds81, ds82, ds83 24 led, green, smd panasonic ln1351c ds04, ds05, ds06, ds07, ds17, ds18, ds19, ds20, ds21, ds24, ds25, ds26, ds36, ds37, ds38, ds39, ds40 17 l_led, red, smd panasonic ln1251c ds08, ds50, ds63, ds64, ds65, ds66 6 l_led, green, smd panasonic ln1351c ds09, ds10, ds11, ds12, ds13, ds14, ds15, ds16, ds22, ds23, ds27, ds28, ds29, ds30, ds31, ds32, ds71, ds72, ds73, ds74 20 led, red, smd panasonic ln1251c ds67, ds68, ds69, ds70 4 led, amber, smd panasonic ln1451c h01, h02, h03, h04, h05, h06, h07, h08, h09, h10, h11, h12 12 kit, 4-40 hardware, .50 nylon standoff and nylon hex-nut na 4-40kit4 j01, j12, j13, j17, j18 5 terminal strip, 16 pin, dual row, vert samtec tsw-108-07-t-d j02, j50 2 terminal strip, 10 pin, dual row, vert na na j03, j43 2 type b single rt angle, black mol na j04, j51 2 l_conn, db9 ra, long case amp 747459-1 j05, j06, j48, j49 4 non populated header, 14 pin, dual row, vert samtec nopop-hdr-tsw-107-14-t-d j07, j08, j10, j11 4 nopop terminal strip, 16 pin, dual row, vert samtec nopop-tsw-108-07-t-d downloaded from: http:///
___________________________________________________ ____________________________________ ds3 3 x 1 1 dk rev: 030508 14 of 39 designation qty description supplier part j09, j14, j20, j21, j22, j23, j52, j53, j57 9 l_terminal strip, 10 pin, dual row, vert samtec tsw-105-07-t-d j15, j46 2 conn 2.1mm/5.5mm pwrjack rt angle pcb, closed frame, high current 24vdc@5a also requires 5v acdc adapter input 100- 240vac 50-60hz 0.6a output dc 5v 2.6a. pn dms050260-p5p-sz. model 3z-161wp05 digikey cp-002ah-nd j16, j24 2 connector, stacked octal jack, 64-pin, shielded mol sd-44520-001 j19, j25, jb06 3 100 mil 2 pos jumper na na j26, j27, j28, j29, j30, j31, j32, j33, j34, j35, j36, j37, j38, j39, j40, j41, j44, j45 18 l_2 pin header, .100 centers, vertical samtec tsw-102-07-t-s j42, j58 2 100 mil 2*7 pos jumper na na j47 1 l_rj48 8 pin single port connector molex 15-43-8588 j54, j93, j94, j95, j96 5 l_terminal strip, 10 pin, dual row, vert do not populate dnp dnp j55 1 header, 14 pin, dual row, vert samtec hdr-tsw-107-14-t-d j56, j98 2 connector, pulsejack, 16 pin pulse jk0654218z j91, j92 2 connector, fastjack single, 8 pin for national phy halo electronics hfj11-2450e j97, j99 2 socket, smd, 50 pin, 2 row vertical samtec tfm-125-02-s-d-lc jb01, jb05 2 plug, smd, 50 pin, 2 row vertical samtec sfm-125-l2-s-d-lc jb02, jb04 2 testpoints for smd 50 pin, 2 row vertical na na_notpopulated jb03 1 100 mil 2 pos jumper do not populate nopop na reference designators shown on next row (begins with jp01) 49 100 mil 3 pos jumper na na jp01, jp02, jp03, jp04, jp05, jp06, jp07 , jp08, jp09, jp10, jp11, jp12, jp13, jp 14, jp15, jp16, jp17, jp18, jp19, jp20, jp21, jp22, jp23, jp24, jp25, jp26, jp27 , jp28, jp29, jp67, jp68, jp69, jp70, jp 71, jp72, jp73, jp74, jp75, jp76, jp77, jp78, jp79, jp80, jp81, jp82, jp83, jp84, jp85, jp86 r01, r02, r42, r43, rb01, rb02, rb04, rb39, rb46, rb47, rb62, rb87, rb88, rb89, rb90, rb91, rb107, rb128, rb231, rb232 20 res 0603 0.0 ohm 1/16w 5% panasonic erj-3gey0r00v r03, r05, rb09, rb10, rb12, rb14, rb26, rb28, rb96, rb97, rb100, rb113, rb114, rb115, rb116, rb118, rb120, rb122, rb123 19 res 0603 30 ohm 1/16w 5% panasonic erj-3geyj300v r04, rb03, rb05, rb07, rb13, rb18, rb23, rb24, rb25, rb92, rb99, rb101, rb104, rb106, rb121 15 l_res 0603 330 ohm 1/16w 5% panasonic erj-3geyj331v downloaded from: http:///
___________________________________________________ ____________________________________ ds3 3 x 1 1 dk rev: 030508 15 of 39 designation qty description supplier part r06, r07, r39, r41 4 res 0603 24.3 ohm 1/16w 1% panasonic erj-3ekf24r3v r08, rb06, rb15, rb17, rb19, rb20, rb21, rb43, rb45 9 l_res 0603 1.0k ohm 1/16w 5% panasonic erj-3geyj102v r09, r10, r11, r12, r14, r15, r16, r17, r18, r19, r20, r21, r22, r23, r24, r25, r26, r27, r28, r29, r30, r31, r32, r33, r34, r35, rb32, rb33, rb48, rb49, rb50, rb51 32 res 1206 61.9 ohm 1/8w 1% panasonic erj-8enf61r9v r13, rb30, rb31, rb60, rb61, rb109, rb110, rb111, rb127 9 l_res 0603 10k ohm 1/16w 5% panasonic erj-3geyj103v r36, r40 2 res 0603 1.0m ohm 1/16w 5% panasonic erj-3geyj105v r37, r38 2 res 0805 61.9 ohm 1/10w 1% panasonic erj-6enf61r9v rb08, rb41, rb98, rb108 4 res 0603 10k ohm 1/16w 5% panasonic erj-3geyj103v rb11, rb95 2 res 0603 1.5k ohm 1/16w 5% panasonic erj-3geyj152v rb119, rb246 2 res 0603 9.76k ohm 1/16w 1% panasonic erj-3ekf9761v rb125, rb126, rb129, rb245, rb248, rb249 6 res 0603 2.0k ohm 1/16w 5% panasonic erj-3geyj202v rb16, rb22, rb131, rb132 4 l_res 0603 0 ohm 1/16w 1% avx cj10-000f rb233, rb234, rb235, rb236, rb239, rb241 6 res 0603 2.2k ohm 1/16w 5% panasonic erj-3geyj222v rb237, rb238 2 res 0603 4.87k ohm 1/16w 1% panasonic erj-3ekf4871v rb27, rb124, rb130, rb247 4 res 0603 330 ohm 1/16w 5% panasonic erj-3geyj331v rb29, rb34, rb35, rb36, rb37, rb38 6 res 0603 51 ohm 1/10w 5% - see special instructions panasonic erj-3gey0r00v rb40, rb44, rb112, rb240, rb242, rb243, rb244 7 res 0603 30 ohm 1/16w panasonic erj-3geyj300v rb42, rb117 2 res 0805 10k ohm 1/10w 1% panasonic erj-6enf1002v rb52, rb53, rb54, rb55, rb56, rb57, rb58, rb59, rb63, rb64, rb65, rb66, rb67, rb68, rb69, rb70, rb103, rb105 18 res 0603 332 ohm 1/16w 1% panasonic erj-3ekf3320v rb71, rb72, rb73, rb74, rb75, rb76, rb77, rb78, rb79, rb80, rb81, rb82, rb83, rb84, rb85, rb86, rb93, rb94, rb102 19 res 0603 51 ohm 1/16w 5% panasonic erj-3geyj510v rp01, rp02, rp03, rp04, rp05, rp06, rp41, rp42, rp43, rp44, rp48, rp49, rpb07, rpb10, rpb109, rpb110 16 4 pack resistor 24 ohm 2 pct koa cn1j4ttd240g rp07, rp08, rp09, rp10, rp12, rp45, rp46, rp47, rp50, rp51, rpb15, rpb19, rpb93, rpb98, rpb107, rpb108, rpb131, rpb132, rpb144, rpb145 20 4 pack resistor 50 ohm 2 pct koa cn1j4ttd500g see next row (begins with rp11) 62 4 pack resistor 30 ohm 5% quad 0402 panasonic exb-n8v300jx downloaded from: http:///
___________________________________________________ ____________________________________ ds3 3 x 1 1 dk rev: 030508 16 of 39 designation qty description supplier part rp11, rp13, rp15, rp16, rp17, rp18, rp19, rp20, rp25, rp26 , rp27, rp28, rp29, rp30, rp31, rp32, rp33, rp34, rp35, rp36, rp37, rp38, rp39, rp84, rp85, rp86, rp87, rp88, rp89, rp91, rp92, rp93, rp94, rpb05, rpb08, rpb09, rpb11, rpb13, rpb16, rpb18, rpb21, rpb24, rpb25, rpb30, rpb 35, rpb43, rpb44, rpb51, r pb52, rpb58, rpb59, rpb60, rpb61, rpb62, rpb63, rpb64, rpb65, rpb84, rpb87, rpb91, rpb99, rpb143 rp14, rpb04, rpb06, rpb14, rpb20, rpb22, rpb54, rpb55, rpb56, rpb66, rpb77, rpb79, rpb89, rpb92, rpb94, rpb95, rpb96, rpb97, rpb100, rpb101, rpb103, rpb150 22 4 pack resistor 10k ohm 5% quad 0402 panasonic exb-n8v103jx rp21, rp22, rp23, rp24, rpb26, rpb27, rpb28, rpb29, rpb31, rpb32, rpb33, rpb34, rpb36, rpb38, rpb39, rpb40, rpb41, rpb42, rpb45, rpb46, rpb47, rpb49, rpb50, rpb53 24 4 pack resistor 20 ohm 5% quad 0402 panasonic exb-n8v200jx rp40, rp90, rpb01, rpb02, rpb03, rpb12, rpb17, rpb37, rpb57, rpb67, rpb68, rpb69, rpb70, rpb71, rpb74, rpb78, rpb80, rpb82, rpb83, rpb85, rpb90, rpb104, rpb149 23 4 pack resistor 1k ohm 5% quad 0402 panasonic exb-n8v102jx rpb23, rpb48, rpb72, rpb73, rpb75, rpb76, rpb81, rpb86, rpb102, rpb105, rpb133, rpb135, rpb147 13 4 pack resistor 330 ohm 5% quad 0402 panasonic exb-n8v331jx rpb88, rpb106, rpb134, rpb136, rpb137, rpb138, rpb139, rpb140, rpb141, rpb142, rpb146, rpb148 12 4 pack resistor 2.2k ohm 5% quad 0402 panasonic exb-n8v222jx sw01 1 switch mom 4pin single pole panasonic evqpae04m t01, t02, t03 3 xfmr, octal t3/e3, 1 to 2, smt 32 pin pulse t3049 tb01, tb02, tb03, tb04 4 xfmr, xmit/rcv, 1 to 2 and 1 to 1, smt 32 pin pulse tx1475 tb05 1 xfmr, 1ct_1ct & 1ct_2ct, 12p smt pulse tx1277 tp01, tpb01, tpb02, tpb07, tpb08, tpb09 6 testpoint, 1 plated hole, do not stuff na na u01, u19 2 usb uart (usb - 8 bit fifo), 32 pin lqfp ftd ft245bm u02 1 ethernet extension device 16 wan 2 lan dallas semiconduc tor na u03, ub29 2 spi serial eeprom 2m 8 pin soic 2.7v to 3.6v atmel at25f2048n-10su-2.7 u04, u05, u06, u07, u11, u22, ub12, ub14, ub15, ub17, ub19, ub34 12 ic, oct buffer fet switch 5v 20-pin tssop philips cbt3244apw u08, u15 2 ic, octal transceiver 0-70c 256p bga dallas semiconductor ds26528n u09, u10, u12, ub13, ub18, ub20 6 bad partnum ic, oct buffer fet switch 5v tsop philips cbt3244apw-t u13, u23, ub22, ub33 4 cypress sram, lab stock na na u14, u24 2 ic, fpga, 1.2v, 20x20 tqfp, 144 pin lattice lfec3e-3t144c downloaded from: http:///
___________________________________________________ ____________________________________ ds3 3 x 1 1 dk rev: 030508 17 of 39 designation qty description supplier part u16, u17 2 quad triple dual single atm packet phys for ds3 e3 sts1 0-70c 400p bga dallas semiconductor ds3184 u18, u27 2 mmc2107 proc essor motorola mmc2107 u20 1 ds3/e3 sct, 11x11 csbga, 100 pin dallas semiconductor ds3170 u21 1 ic, single t1 e1 j1 transceiver, 10x10 lqfp, 64-pin dallas semiconductor ds26521 u25 1 ethernet extension device 1 wan 2 lan dallas semiconductor na u26, u33 2 gig phyter v, 10/100/1000 ethernet physical layer, 128 pin qfp national semiconductor dp83865bvh u31, u32 2 ic, dp83848c phyter 10/100 ethernet transceiver, 48 pin tqfp national semiconductor dp83848c ub01, ub28, ub70 3 high speed buffer fairchild nc7sz86 ub02, ub36 2 sink source ddr termination regulator avnet lp2995m ub03, ub35 2 double data rate (ddr) sdram 2-2-2 timing 256mbitx16 tssop micron na ub04, ub30 2 ic, linear reg 1.5w, 1.8v or adj, 1a, 16tssop-ep maxim max1793eue-18 ub05, ub06, ub37, ub38 4 ic, linear reg 1.5w, 2.5v or adj, 1a, 16tssop-ep maxim max1793eue-25 ub07, ub08, ub09, ub11, ub16, ub23, ub24, ub25, ub26, ub27 10 ic, linear reg 1.5w, 3.3v or adj, 1a, 16tssop-ep maxim max1793eue-33 ub10, ub31 2 dual rs-232 transceivers with 3.3v/5v internal capacitors maxim na ub21, ub32 2 ic, ldo regulator with reset,1.20v output 300 ma, 6 pin sot23 maxim max1963ezt120-t xb01, xb02 2 xtal low profile 8.0mhz ecl ec1-8.000m y01, yb07 2 xtal, low profile, 6.00 mhz pletronics lp49-26-6.00m yb01, yb03, yb09, yb11 4 socketed oscillator, crystal clock, 3.3v - 125.000 mhz ecliptek ec1325hsts-125.000m+socket yb02, yb10 2 socketed oscillator, crystal clock, 3.3v - 25.000 mhz saronix nth089aa3-25.000+socket yb04 1 oscillator, crystal clock, 5.0v - 44.736 mhz saronix nth089aa-44.736 yb05 1 oscillator + socket, crystal clock, 3.3v - 2.048 mhz saronix socket+nth039a3-2.0480 downloaded from: http:///
___________________________________________________ ____________________________________ ds3 3 x 1 1 dk rev: 030508 18 of 39 designation qty description supplier part yb06 1 oscillator + socket, crystal clock, 5v - 1.544 mhz saronix socket+nth039a-1.5440 yb08 1 oscillator, crystal clock, 3.3v - 44.736 mhz saronix nth089aa3-44.736 yb12 1 oscillator, crystal clock, 3.3v - 1.544 mhz saronix nth039a3-1.5440 yb13 1 oscillator, crystal clock, 3.3v - 2.048 mhz saronix nth039a3-2.0480 downloaded from: http:///
___________________________________________________ ____________________________________ ds3 3 x 1 1 dk rev: 030508 19 of 39 maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the ci rcuitry and specifications wi thout notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ? 2008 maxim integrated products is a registered trademark of maxim integrated products. 9 . sc he m a t ic s the DS33X11DK schematics are featured in the following pages. as this is a hierarchal schematic some explanation follows. the schematic contains six hierarchal blocks: the microcontroller, ds26521, ds3170, ethernet phy, ethernet test points, and power supply. all signals inside a hierarchy block are local, with exception for v cc and ground. in-port and out-port connectors are used to allow signals inside a hierarchy block to become accessible as pins on the hierarchy blocks symbol. from here blocks are wired together as if they were ordina ry components. the system diagram is shown again below, with schematic page numbers given for each functional block. ds26521 block page 5 symbol schematic pages 22?23 ethernet phy page 7 symbol schematic pages 19?20 ds3170 liu block page 5 symbol schematic page 21 ds33x11 schematic pages 4?8 p block page 4 symbol schematic pages 12?16 ds33x11 section contains six hierarchy blocks schematic pages 4?11 ds33x11 pcb layout and schematic hierarchy block page listing power supply page 10 symbol schematic page 17 ethernet test points page 7 symbol schematic page 18 downloaded from: http:///
DS33X11DK contents / index beginning of DS33X11DK microport. p.4,12-16 ethernet. p.6-7,18,19-20 power. p.10-11,17 oscillators. p.7 bias+config. p.9 block name: _DS33X11DK_dn. parent block: \_rc_top_dn_\ ds33x42x82x162ee01a0 microport. p.4,12-16 steve scully 06/07/2006 1/8(block) 4/76(total) 10k d7_spi_cpol inverter u25 d6_spi_cpha 10k stmd 10k dut_jtdi d1_spi_mosi loop_sourcetime_b spi_miso te1_int te1_l_cs spi_sck reset_sys te3_int te3_l_cs rd wr data<7..0> phy_int x162_int x162_cs spi_ss spi_mosi loop_sourcetime_a dut_sysclk dut_jtrst_n dut_jtdo dut_jtclk dut_jtms reset_sys dut_hiz_n d0_spi_miso d2_spi_clk d5_spi_swap x162_int x162_cs te1_enl<8..1> enable_driver_h addr<12..0> reset_sys enable_callbacks_h stmd ddr memory. p.8 wan. p.5,21(t3),22-23(t1) 4 1 u3 k6 l6 k3 e12 g4 f4 k2 l2 f5 h2 m1 j6 k1 f12 m12 h3 g3 g2 f2 l5 f10 m9 g11 f6 f7 j7 m6 f1 h12 h6 m7 h7 m2 f11 k12 h1 j4 k4 l4 j5 k5 g5 j3 g6 g7 m5 l1 m11 f3 3 1 2 5 6 7 8 4 rpb92 3 1 2 5 6 7 8 4 rpb97 page: date: title: engineer: a a b b c c d d 1 1 2 2 3 3 4 4 5 5 6 6 7 7 88 _motprocrescard_dn hierarchy block microprocessor int3 reset_in a_dut_<12..0> int4 cs_x3 cs_x4 cs_x5 rd_dut wr_dut d_dut<7..0> int5 int2 cs_x2 cs_x1 spi_cs spi_sck spi_mosi spi_miso misc_io<8..1> misc_io<9> misc_io<10> misc_io<11> misc_io<12> float ds33x11_u microport interface ground nc_vcc vdd_1.8v vdd_1.8v vdd_1.8v vdd_1.8v vdd_1.8v cs* int* spi_cpha spi_swap spi_clk spi_mosi spi_miso vd_3.3v vd_3.3v vd_3.3v vd_3.3v vd_3.3v vd_3.3v vd_3.3v vdd_1.8v vdd_1.8v vss vss vss vss vss vss hiz* spi_cpol rst* jtms jtclk jtdi vss vss vss vss vss jtdo nc_dnu nc_dnu nc_gnd nc_dnu jtrst_n sysclk nc_dnu nc_gnd nc_gnd nc7sz86_u v3_3 v1_8 v3_3 downloaded from: http:///
wan_rsync1 wan_rdata1 wan_rgclk1 wan_tgclk1 wan_tdata1 wan_tsync1 wan_jtrst addr<10..0> te3_rdata1 te3_rsync1 reset_sys data<7..0> rd te3_l_cs wr wan_jtck wan_jtms wan_jtdo te3_rdata1 te3_rsync1 te3_tgclk1 te1_rsync1 te1_rdata1 te1_rgclk1 te1_tsync1 wan_rdata1 te3_tsync1 port1_te3_enl wan_tgclk1 wan_rgclk1 wan_rsync1 te3_rgclk1 te3_tsync1 te3_rgclk1 te1_tgclk1 te1_enl<1> te3_tgclk1 port1_te3_enl wan_tsync1 te3_int te3_tdata1 reset_sys te1_int data<7..0> addr<12..0> rd te1_l_cs wr wan_jtms wan_jtck wan_jtdi wan_jtrst te1_rgclk1 te1_rdata1 te1_rsync1 te1_tgclk1 te1_tdata1 te1_tsync1 wan_jt1tot3_td wan_jt1tot3_td wan_tsync1 wan_tdata1 wan_tgclk1 wan_rdata1 wan_rsync1 wan_rgclk1 wan_tdata1 30 te3_tdata1 te1_tdata1 u25 u22 ub34 j54 wan. p.5,21(t3),22-23(t1) ds33x42x82x162ee01a0 steve scully 5/76(total) block name: _DS33X11DK_dn. parent block: \_rc_top_dn_\ 06/07/2006 2/8(block) 6 5 4 9 7 3 10 8 1 2 g1 j2 j1 m3 l3 m4 5 3 9 7 17 15 13 8 46 2 20 1 19 10 18 16 14 12 11 5 3 9 7 17 15 13 8 46 2 20 1 19 10 18 16 14 12 11 3 1 2 5 6 7 8 4 rpb91 page: date: title: engineer: a a b b c c d d 1 1 2 2 3 3 4 4 5 5 6 6 7 7 88 v3_3 cbt3244a_u octal fet switch 2a1 1y4 1y3 1y2 1y1 gnd 2oe* 1oe* vcc 1a1 1a3 1a2 1a4 2a2 2a3 2a4 2y2 2y1 2y4 2y3 cbt3244a_u octal fet switch 2a1 1y4 1y3 1y2 1y1 gnd 2oe* 1oe* vcc 1a1 1a3 1a2 1a4 2a2 2a3 2a4 2y2 2y1 2y4 2y3 v5_0 wan interface ds33x11_u tsync1 tdata1 tclk1 rsync1 rdata1 rclk1 _te3wan_dn te3_rgclk te3_tgclk te3_tsofo te3_rsofo te3_tser te3_rser te3_tclki te3_rclki jtdo jtrst jtms jtclk jtdi t3_int wr cs rd dat<7..0> addr<10..0> reset_b 6 10 8 4 1 2 3 5 7 9 conn_10p _ds26521dk01a0dutdn_ tsync521 tser521 tchclk521 rsync521 rser521 rchclk521 jtrst jtdo jtdi jtclk jtms wr_dut cs_x3 rd_dut a_dut<12..0> d_dut<7..0> int521 reset521 downloaded from: http:///
eth_txd<7..0> 0 1 2 3 30 0 1 2 3 45 6 7 45 6 7 eth_rxd<7..0> dut_ref_clk eth_mdio dut_rmii_sel eth_mdc dut_dce_sel eth_rx_err eth_rx_crs eth_rxdv eth_col_det eth_rxd<7..0> pb_gmii_clkfrom_mac pb_gmii_clkfrom_mac eth_txd<7..0> eth_rx_clk 30 30 eth_gmii_clkfrom_mac eth_gmii_tx_er_ eth_tx_en eth_tx_clk 30 rb122 u25 ds33x42x82x162ee01a0 steve scully 06/07/2006 block name: _DS33X11DK_dn. parent block: \_rc_top_dn_\ 6/76(total) 3/8(block) ethernet. p.6-7,18,19-20 3 1 2 5 6 7 8 4 rp33 3 1 2 5 6 7 8 4 rp35 j12 j8 j9 h8 h9 l12 f8 g8 k8 l9 k9 l8 m10 m8 h4 k7 h5 l7 k11 k10 l11 l10 g9 g12 f9 h10 h11 j10 j11 g10 3 1 2 5 6 7 8 4 rp37 page: date: title: engineer: a a b b c c d d 1 1 2 2 3 3 4 4 5 5 6 6 7 7 88 ds33x11_u ethernet interface col1 rxd[1] rxd[0] rxd[3] rxd[2] rxdv1 crs1 rxer1 rxd[4] rxd[5] rxd[6] rxd[7] dce_sel mdc rmii_sel mdio refclk gtx_clk1 txd[4] txd[7] txd[6] txd[5] txer1 txen1 txclk1 txd[3] txd[2] txd[1] txd[0] rxclk1 downloaded from: http:///
use clk_to_mac in gmii mode dut_ref_clk: rmii (50 mhz) gmii (125 mhz) mii (25 mhz) not connection to a resource card is intended for use as testpoints ethernet connector (i.m. bus) dut_ref_clk py25mhzosc 30 jmp_3 clk_to_mac_testpnt clk_to_mac 30 2.2k eth_rxd<7..4> eth_txd<3..0> eth_rxd<3..0> dut_sysclk eth_gmii_clkfrom_mac eth_gmii_tx_er_ eth_txd<7..4> py25mhzosc eth_mdc eth_mdio reset_sys eth_gmii_tx_er_ eth_tx_en eth_tx_clk eth_rx_crs eth_rx_clk eth_rxdv eth_txd<7..0> eth_rxd<7..0> phy_int eth_rx_err eth_col_det av_ref_clk eth_gmii_clkfrom_mac clk_to_mac_testpnt 30 25.000mhz_3.3v_socket clk_to_mac 125.000mhz_3.3v_socket 30 av_ref_clk 0.0 rb116 rb118 yb11 rb114 jp15 yb10 r101 rb115 block name: _DS33X11DK_dn. parent block: \_rc_top_dn_\ 06/07/2006 7/76(total) 4/8(block) steve scully ethernet. p.6-7,18,19-20 ds33x42x82x162ee01a0 1 8 4 5 r7 1 3 2 1 8 4 5 page: date: title: engineer: a a b b c c d d 1 1 2 2 3 3 4 4 5 5 6 6 7 7 88 v3_3 vcc 1 osc gnd out v3_3 vcc 1 osc gnd out v3_3 gmii only _phy_dp83865bvh_dn clktomac_testpnt clktomac ref_clk gmii_clkfrom_mac spare<4..1> col_det rx_err phy_int rxd<7..0> txd<7..0> rxdv rx_clk rx_crs tx_clk tx_en tx_er_ reset_b mdio mdc phyosc25m single 50 pin for connection to ethernet card used on bottom of motherboard _phy_imbus_mb_dn connectors ethernet (lan) i.m. card plug-connectors osc25m mdc phy_int mdio ref_clk pt2_tx_en pt2_rx_clk pt2_col_det pt1_tx_en pt1_tx_clk pt1_txd<3..0> pt1_rx_err pt1_rx_crs pt1_rxdv pt1_rx_clk pt1_col_det pt1_rxd<3..0> gmii_tx_er_ gmii_clktomac_buf spare gmii_clkfrom_mac reset_b pt2_tx_clk pt2_txd<3..0> pt2_rx_err pt2_rx_crs pt2_rxdv pt2_rxd<3..0> downloaded from: http:///
of 4.87k 1% was chosen to simplify bom resistor divider component values (the dp83848 phy uses the same value resistor) for ddr cb431 ddr_cas ddr_cs ddr memory. p.8 06/07/2006 5/8(block) 8/76(total) ds33x42x82x162ee01a0 steve scully block name: _DS33X11DK_dn. parent block: \_rc_top_dn_\ c267 u25 c135 c152 c139 cb443 cb461 c142 c151 c146 c136 c150 c134 cb425 c156 ub35 tpb02 4.7uf 4.7uf ddr_ldm ddr_ckinv vref_from_vreg .01uf ddr_a<12..0> ddr_ba1 ddr_ba0 ddr_cas ddr_ras ddr_ckinv ddr_cke ddr_cs ddr_ldm ddr_udm ddr_ck 12 11 10 9 8 7 6 5 4 3 2 1 0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 15 14 ddr_ba0 ddr_ba1 ddr_ras ddr_we ddr_ck ddr_udm vref_from_vreg ddr_ldqs ddr_udqs 4.7uf 4.7uf 0.1uf .1uf .1uf .1uf 4.7uf 4.7uf 4.7uf .01uf 15 14 13 12 11 10 98 7 65 4 3 2 1 0 12 11 10 98 7 65 4 3 2 1 0 ddr_a<12..0> ddr_dq<15..0> ddr_cke .1uf ddr_dq<15..0> ddr_ldqs vref_from_vreg ddr_we ddr_udqs 4.87k 4.87k .01uf a11 b11 d11 a10 c11 b10 d10 c10 c8 d8 b8 e9 c9 d9 b9 a9 d7 e8 a8 c1 e1 c2 e2 d12 e4 c6 b1 d6 e7 e6 a5 e5 a7 b5 c5 d5 d4 c4 d3 b4 c3 a4 b3 b2 d2 a3 d1 c12 a1 b7 b6 a6 e3 a12 e11 b12 e10 a2 c7 r3 r4 2 1 51 65 16 60 63 62 57 59 56 54 13 10 8 11 5 7 42 29 49 61 3 9 15 55 33 1 18 66 34 48 52 12 64 58 6 17 25 43 53 14 50 19 47 20 46 24 45 44 21 23 22 27 26 38 37 36 35 32 31 30 42 41 28 40 39 page: date: title: engineer: a a b b c c d d 1 1 2 2 3 3 4 4 5 5 6 6 7 7 88 mt46v16m16bg75 a8 a9 a10/ap a11 a12 a1 a2 a3 a4 a5 a6 a7 ba0 ba1 cas ras we cke ck cs ck_inv ldm udm dnu dnu nc nc nc nc nc vssq vssq vssq vssq vssq vss vss vss vdd vdd vdd vddq vddq vddq vddq vddq vref a0 dq0 dq1 dq3 dq2 dq6 dq4 dq5 dq7 dq8 dq9 dq11 dq10 dq13 dq14 dq12 ldqs dq15 udqs v2_5 v2_5 ddr interface ds33x11_u vddq_2.5v vddq_2.5v vddq_2.5v vddq_2.5v vsso vsso vsso vsso vsso vsso vsso avss sd_a[3] sd_a[0] sd_a[1] sd_a[2] sd_a[8] sd_a[9] sd_a[10] sd_a[11] sd_a[12] sd_ba[1] sd_ba[0] sd_cas* sd_we* sd_ras* sd_clk* sd_clken sd_cs* sd_ldm sd_udm vref vddp_2.5v vddp_2.5v vddq_2.5v avdd_1.8v sd_a[7] sd_a[6] sd_a[5] sd_a[4] sd_clk sd_ldqs sd_udqs sd_dq[15] sd_dq[14] sd_dq[13] sd_dq[12] sd_dq[11] sd_dq[10] sd_dq[9] sd_dq[8] sd_dq[7] sd_dq[6] sd_dq[5] sd_dq[3] sd_dq[4] sd_dq[2] sd_dq[1] sd_dq[0] v1_8 v2_5 v2_5 v2_5 downloaded from: http:///
loop_sourcetime_b: is not used with ds33x11 loop_sourcetime_a: (in driver mode only) enable_driver_h: enables device drivers when jumper is ins talled enable_callbacks_h: enables interrupt handling when jump er is installed device driver settings when jumper is not installed wan ports 1-4 and 9-12 have tclk< =refclkio when jumper is installed wan ports 1-4 and 9-12 have tclk<=rc lk dut_jtrst_n wan_jtrst wan_jtdo dut_jtdi loop_sourcetime_a 10k x162_cs d2_spi_clk d1_spi_mosi d0_spi_miso spi_mosi spi_miso spi_sck spi_ss enable_callbacks_h enable_driver_h te1_enl<1> loop_sourcetime_b 10k d7_spi_cpol d6_spi_cpha d5_spi_swap 1k 1k 1k 30 wan_jtms wan_jtck dut_jtdo dut_jtclk dut_jtms wan_jtdi 10k dut_jtdi dut_jtms dut_jtclk dut_jtrst_n 330 dut_rmii_sel dut_hiz_n dut_dce_sel x162_int jp28 jp22 jp29 ds40 rb127 j57 j50 j55 9/76(total) block name: _DS33X11DK_dn. parent block: \_rc_top_dn_\ 06/07/2006 steve scully ds33x42x82x162ee01a0 6/8(block) bias+config. p.9 1 3 2 1 3 2 1 3 2 3 1 2 5 6 7 8 4 rpb101 3 1 2 5 6 7 8 4 rpb99 1 3 9 5 7 4 26 10 8 3 1 2 5 6 7 8 4 rpb105 6 5 4 9 7 3 10 8 1 2 3 1 2 5 6 7 8 4 rpb78 3 1 2 5 6 7 8 4 rpb80 3 1 2 5 6 7 8 4 rpb104 24 8 6 3 1 9 11 13 10 5 7 14 12 3 1 2 5 6 7 8 4 rpb100 page: date: title: engineer: a a b b c c d d 1 1 2 2 3 3 4 4 5 5 6 6 7 7 88 2 3 7 13 8 59 11 6 4 10 12 14 1 conn_14p v3_3 v3_3 6 10 8 4 1 2 3 5 7 9 conn_10p conn_10p 5 3 1 7 tms tck tdi tdo vcc gnd v3_3 v3_3 downloaded from: http:///
traces between regulator output and v2.5 should be long enough to build 0.05 ohm of resistance to ensure load sharing between the 2.5v 1% regulators trace geometry for this is: 1 inch long, 10 mil wide, 1 oz coppe r buffer 3.08v 4.7uf 10uf .01uf 1 amp .1uf 4.7uf .1uf 10uf 10uf 4.7uf 4.7uf 10uf 4.7uf .1uf 4.7uf 4.7uf .1uf 330 4.7uf 4.7uf 4.7uf .1uf 470uf 2.5v .1uf .1uf 4.7uf 10uf 330 green 0.0 .1uf 470uf 470uf 4.7uf .1uf 2.5v .1uf 1.8v 4.7uf 4.7uf 470uf 4.7uf 470uf v1_8 green v2_5 470uf 4.7uf 0.0 .1uf .1uf .01uf .1uf 4.7uf 10uf .1uf .1uf 1.0k reset_sys cb372 cb396 cb394 cb384 cb371 cb363 cb413 cb380 cb367 cb303 db03 cb411 cb412 cb409 cb405 cb437 cb417 cb422 cb410 cb404 cb418 j46 rb101 c132 cb397 cb383 r43 rb104 ds34 cb470 c158 cb463 r42 c157 cb462 cb460 ub28 ds33 c117 c120 cb319 cb432 cb393 cb365 cb368 cb424 cb450 cb373 ub38 ub37 cb301 cb298 cb447 ub30 cb453 cb449 cb445 cb401 block name: _DS33X11DK_dn. parent block: \_rc_top_dn_\ steve scully ds33x42x82x162ee01a0 10/76(total) 06/07/2006 7/8(block) power. p.10-11,17 15 6 7 13 5 4 2 17 10 11 14 12 3 2 1 3 1 42 u1 4 3 1 2 sw1 r9 2 1 2 1 2 1 1 2 2 1 2 1 4 1 1 2 2 1 15 6 7 13 5 4 2 17 10 11 14 12 3 15 6 7 13 5 4 2 17 10 11 14 12 3 2 1 page: date: title: engineer: a a b b c c d d 1 1 2 2 3 3 4 4 5 5 6 6 7 7 88 max1793_u in2 out1 out3 set gnd gnd in1 in3 in4 out2 shdn rst out4 max1793_u in2 out1 out3 set gnd gnd in1 in3 in4 out2 shdn rst out4 v3_3 nc7sz86_u v1_8 v2_5 v3_3 4_amp_power_supply regulator_input reset_out supply_output v2_5 v1_8 v2_5 v3_3 max811_u reset* vcc gnd mr* v3_3 v5_0 max1793_u in2 out1 out3 set gnd gnd in1 in3 in4 out2 shdn rst out4 v3_3 downloaded from: http:///
.01uf .1uf .1uf .1uf 4.7uf .50standoff__nut .50standoff__nut 4.7uf .1uf .1uf .1uf .1uf .1uf .1uf .50standoff__nut .1uf 4.7uf .50standoff__nut .50standoff__nut .50standoff__nut .01uf .01uf .1uf .1uf 4.7uf 4.7uf 4.7uf .01uf .01uf .01uf .1uf .1uf .1uf 4.7uf 4.7uf 4.7uf .01uf .1uf .01uf .01uf .01uf .1uf .1uf .1uf 4.7uf 4.7uf 4.7uf .1uf .1uf 4.7uf 4.7uf .1uf 10uf v2_5 v3_3 4.7uf .1uf .1uf .1uf .1uf .1uf .1uf 4.7uf 4.7uf .1uf 4.7uf .01uf .01uf .01uf .01uf .01uf .01uf .1uf .1uf 4.7uf 4.7uf 4.7uf v3_3 v3_3 .01uf .01uf .1uf 4.7uf .1uf .1uf .1uf .1uf .01uf 4.7uf 4.7uf 4.7uf 4.7uf 4.7uf 4.7uf 4.7uf 4.7uf 4.7uf 4.7uf 4.7uf 4.7uf 4.7uf .1uf 4.7uf v3_3 .1uf .1uf .1uf .1uf .1uf .1uf .1uf .01uf h12 h10 h07 h08 h09 h06 cb285 cb451 cb296 cb318 cb300 cb308 cb295 cb283 cb280 cb326 c114 cb286 cb278 cb293 cb307 cb284 cb287 cb361 cb377 cb385 cb444 cb434 cb465 cb438 cb446 cb454 cb297 cb350 cb455 cb442 cb321 cb328 cb313 cb324 cb341 cb315 c123 c124 c131 c119 c122 c129 c130 cb421 cb440 cb436 cb441 cb400 cb430 cb426 cb342 cb466 cb468 cb415 cb282 cb288 cb289 c127 cb344 cb343 cb320 cb316 cb331 cb309 cb317 cb327 cb351 cb375 cb374 cb334 cb329 cb340 cb294 c115 cb323 cb346 c113 c118 c125 c133 cb435 cb419 cb439 cb414 cb464 cb469 c147 cb467 cb427 c137 cb302 cb306 cb345 cb322 cb304 cb311 cb312 cb314 cb339 cb325 cb305 block name: _DS33X11DK_dn. parent block: \_rc_top_dn_\ steve scully power. p.10-11,17 06/07/2006 11/76(total) 8/8(block) ds33x42x82x162ee01a0 1 1 1 tp1 tp2 tp3 tp4 tp5 tp6 tp7 tp8 1 1 1 page: date: title: engineer: a a b b c c d d 1 1 2 2 3 3 4 4 5 5 6 6 7 7 88 4 4 4 4 v2_5 v5_0 4 v1_8 4 downloaded from: http:///
beginning of processor hierarchy block pd<31..0> tim_16h_8l once_tms once_trst_b once_tclk spi_miso spi_mosi spi_cs cs1 cs0 eb0 14 15 22 1 2 pa<22..0> gnd 14 15 16 11 12 13 16 18 17 19 18 21 98 7 6 23 24 28 19 29 30 5 3 20 20 .1uf 0 1 4 21 3 5 6 7 98 10 11 12 13 22 20 25 sci1_out sci2_in int3 user_led2 run_kit_usr int4 xtal yco cs2 cse0 eb2 eb1 pqb1 eb3 cse1 2107_tdo once_tdi tc1 cs3 pqa1 pqa0 pqa3 pqa4 icoc22 icoc23 icoc20 icoc21 icoc11 icoc12 icoc13 test icoc10 sci2_out user_led1 sci1_in rw tea vrh oe rcon ta tc2 17 1uf int2 kit_status pqb3 pqb2 pqb0 osc_mcu 26 27 once_de_b spi_sck proc_reset_out cpuclk_out reset_in 4 10 31 flash_vpp vddsyn 0.0 ds33x42x82x162ee01a0 1/5(block) 06/07/2006 steve scully printed mon may 14 11:03:56 2007 12/76(total) block name: _motprocrescard_dn. parent block: \_ds33x11d k_dn\ cb433 45 9 19 17 20 21 22 25 27 30 31 34 35 16 15 12 10 7 5 4 3 2 1 36 37 38 39 40 41 42 43 46 48 51 114 73 126 140 127 76 64 44 32 18 8 50 49 47 29 28 26 24 23 13 11 6 139 137 136 134 132 131 122 121 119 117 116 144 14 112 59 65 33 123 141 129 77 87 115 74 103 102 92 113 95 97 99 u27 69 68 82 84 75 79 124 91 90 80 71 138 86 118 128 120 93 143 83 85 62 67 98 100 101 104 105 106 88 96 60 135 133 78 81 110 111 109 108 107 94 142 130 125 53 52 55 54 58 57 56 72 63 61 66 89 70 u27 cb429 rb128 page: date: title: engineer: a a b b c c d d 1 1 2 2 3 3 4 4 5 5 6 6 7 7 88 out out in out mmc2107 control rxd1 int7* txd2 icoc10 test int1* icoc13 icoc12 icoc11 icoc21 icoc20 icoc23 icoc22 extal tclk trst* ss* pqb0 pqa4 pqa3 pqa0 pqa1 cs3* tc1 tdi tdo cse1 eb3* int6* pqb1 pqb2 pqb3 eb0* eb1* eb2* tc2 cse0 cs1* cs2* de* sck rstout* clkout reset* cs0* tms int0* yc0 mosi miso xtal int3* int2* int5* int4 rxd2 txd1 mmc2107 port ta* shs* oe* vrh vstby tea* vddh vddf vdda vpp vdd6 vdd7 vdd8 vddsyn vdd3 vdd5 rw vrl a8 d31 a22 a21 a20 a19 a18 a17 a16 a15 a14 a13 a12 a11 a10 a9 a7 a6 a5 a4 a3 a2 a1 a0 vss1 vss2 vss3 vss4 vss5 vss6 vss7 vss8 vsssyn vssf vssa d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 d10 d30 d29 d28 d27 d26 d25 d24 d23 d22 d21 d11 d12 d13 d14 d15 d16 d17 d18 d19 d20 vdd2 vdd1 vdd4 v3_3 downloaded from: http:///
reset configuration d18 has a 10k load to gnd when set for intern/extern boot master mode full drive boot internal xtal w/ pll internal flash enable pd<21> pd<17> pd<26> pd<16> 10k pd<22> pd<23> pd<28> 10k pd<18> pd<19> 10k cy62128v pd<23..16> misc_io<12> misc_io<11> misc_io<10> misc_io<9> misc_io<8..1> d_dut<7..0> a_dut_<12..0> rd_dut wr_dut int2 cs_x2 cs_x3 cs_x1 cs_x5 cs_x4 reset_in int3 int5 int4 13 pa<17..1> 16 17 20 19 24 21 25 26 27 28 29 30 31 22 9 10 11 12 13 14 16 8 7 65 4 3 2 1 15 17 oe eb0 cs0 pa<17..1> cy62128v oe eb1 cs0 23 18 pd<31..24> 10 11 12 14 15 16 17 1 2 3 45 6 7 89 rcon 2/5(block) ds33x42x82x162ee01a0 steve scully 06/07/2006 13/76(total) block name: _motprocrescard_dn. parent block: \_ds33x11d k_dn\ 3 1 2 5 6 7 8 4 rpb94 3 1 2 5 6 7 8 4 rpb95 3 1 2 5 6 7 8 4 rpb96 21 20 19 18 17 15 14 13 27 26 23 25 4 28 3 31 2 32 16 24 29 1 12 11 10 9 8 7 6 5 30 22 u23 21 20 19 18 17 15 14 13 27 26 23 25 4 28 3 31 2 32 16 24 29 1 12 11 10 9 8 7 6 5 30 22 ub33 page: date: title: engineer: a a b b c c d d 1 1 2 2 3 3 4 4 5 5 6 6 7 7 88 v3_3 cy62128v ce1* ce2 a7 a6 a5 a4 a3 a2 a1 a0 n_c we* oe* gnd vcc a16 a15 a14 a13 a12 a11 a10 a9 a8 io0 io1 io2 io3 io4 io5 io6 io7 v3_3 cy62128v ce1* ce2 a7 a6 a5 a4 a3 a2 a1 a0 n_c we* oe* gnd vcc a16 a15 a14 a13 a12 a11 a10 a9 a8 io0 io1 io2 io3 io4 io5 io6 io7 io io io io io io out out out in out out out out out out in in in v3_3 downloaded from: http:///
todo_removethisnote: 330ohm avcc res used to be 470ohm (bom consoldiate) align key but do not populate place pads for cap .1uf 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 330 once_tms once_tdi 2107_tdo reset_in flash_vpp once_tclk con14p prt1_out prt1_in sci1_out sci1_in prt1_out prt1_in 1.0m 8.0mhz osc_mcu xtal 0 1 2 3 45 6 7 .01uf 30 30 1.5k 22pf 6.00mhz 22pf 10k usb 30 d_dut<7..0> rd#usb pwren#usb rxf#usb si_wuusb green kit_status 330 wrusb txe#usb 10k once_de_b once_trst_b 10k 14/76(total) block name: _motprocrescard_dn. parent block: \_ds33x11d k_dn\ ds33x42x82x162ee01a0 steve scully 06/07/2006 3/5(block) 13 9 7 5 11 3 1 10 12 8 6 4 14 2 j58 20 1 8 45 6 7 9 10 11 12 13 14 15 16 17 18 19 3 2 ub31 9 5 4 2 1 3 6 7 8 j51 r40 1 2 xb02 2 1 jb06 3 1 2 5 6 7 8 4 rpb103 3 1 2 5 6 7 8 4 rpb77 c111 c104 rb95 2 1 c112 5 18 20 23 22 21 25 24 14 15 30 26 13 29 17 9 31 2 1 32 4 3 7 8 19 27 28 16 6 10 12 11 u19 1 2 yb07 2 1 c110 rb97 rb96 2 1 rb98 1 2 3 4 5 j43 rb100 rb130 1 2 ds50 rb99 page: date: title: engineer: a a b b c c d d 1 1 2 2 3 3 4 4 5 5 6 6 7 7 88 v3_3 gnd dat- vdd dat+ usb ft245bm_u si_wu rxf# pwren# 3v3out rd# xtout xtin d6 usbdm usbdp vcc1 reset# eecs eesk eedata test gnd1 gnd2 agnd vccio vcc2 avcc wr txe# d1 d0 d4 d3 d2 d5 d7 rstout# v5_0 v3_3 v3_3 v5_0 v3_3 v3_3 conn_db9p h g f c a b de j max3233e invalid* t2in t2out gnd v- c2- c2+ c1- c1+ v+2 v+1 forceoff* vcc t1out r1out forceon t1in r1in r2out r2in v3_3 con14p downloaded from: http:///
mem_sck must be at pin77 for tqfp144 jumper pins 12+14 to tristate the address databuss of the fpga. this allows the user to connect a different processor cs_x1 cs_x2 cs_x5 cs_x3 cs_x4 cpuclk_out eb1 eb0 cs1 cs0 rw oe int2 int_led wr_dut int5 97_io 0.0 pd<31..16> 23 0 1 2 3 4 5 6 7 pa<16..0> 16 17 18 19 20 21 22 24 25 26 28 30 31 29 27 0 1 2 3 45 6 7 89 10 11 12 13 14 15 16 a_dut_<12..0> 0 1 2 3 45 6 7 89 10 11 12 cs2 misc_io<1> misc_io<2> misc_io<3> misc_io<4> misc_io<6> misc_io<9> misc_io<12> misc_io<5> misc_io<8> d_dut<7..0> 0 1 2 3 4 2 1 0 56 7 12 8 7 10k nopop 65 4 cs_x4 cs_x2 cs_x3 cs_x1 wr_dut rd_dut d_dut<7..0> a_dut_<12..0> int3 int2 tristate_ad_bus rd_dut misc_io<7> mem_so mem_si si_wuusb 3 mem_cs pwren#usb 330 txe#usb rxf#usb tristate_ad_bus misc_io<10> wrusb rd#usb misc_io<11> userfpga2 mem_sck nopop 10k int3 int5 int4 int2 06/07/2006 steve scully ds33x42x82x162ee01a0 4/5(block) 15/76(total) block name: _motprocrescard_dn. parent block: \_ds33x11d k_dn\ 3 1 2 5 6 7 8 4 rpb79 2 1 rb111 24 8 6 3 1 9 11 13 10 5 7 14 12 j48 24 8 6 3 1 9 11 13 10 5 7 14 12 j49 85 87 88 127 77 8 75 74 76 78 79 82 83 100 101 102 103 105 104 107 106 124 123 122 138 137 121 119 118 120 116 115 114 113 112 111 6 7 5 4 3 2 69 70 68 66 64 61 32 39 41 42 43 45 46 47 48 50 49 53 56 34 35 33 30 31 29 23 22 21 20 57 62 65 67 40 141 142 135 60 59 58 51 140 139 25 26 27 134 86 81 131 132 133 129 130 9 u24 rb121 1 2 ds39 rb107 page: date: title: engineer: a a b b c c d d 1 1 2 2 3 3 4 4 5 5 6 6 7 7 88 v3_3 bank 3 lfec_t144_u bank 0 i/o port bank 6 bank 4 bank 5 bank 1 bank 2 input pll pll input pll input bank 7 input pll input pll pll input pl9b/pclkc7_0 pt16b/vref1_0 pt17a/pclkt0_0 pt15a pt15b pt16a/vref2_0 pr14a/rlm0_pllt_fb_a pr12a/dout/cso* pt14b pl14a pl13b pl13a pt12b pt12a pb17a/pclkt5_0 pb19a/vref1_4 pb19b/cs* pb20a/vref2_4 pt14a/tdqs14 pt10a pt10b pb10b pb23a pb22a/bdqs22 pb21a/d2/spid5 pb18b/cs1* pl11a/llm0_pllt_in_a pl11b/llm0_pllc_in_a pl12a/llm0_pllt_fb_a pl12b/llm0_pllc_fb_a pl14b pl15b pl15a/ldqs15 pl16b pl18b/vref2_6 pl18a/vref1_6 pb18a/write* pb17b/pclkc5_0 pb16a/vref2_5 pb16b/vref1_5 pb15b pb15a pb14b pb14a/bdqs14 pb13b pb11b pb11a pb10a pl16a pb20b/d0/spid7 pb21b/d1/spid6 pb22b/d3/spid4 pb23b/d4/spid3 pb25b/d6/spid1 pb24b/d5/spid2 pl2a/vref2_7 pl2b/vref1_7 pl7a pl7b pl8b pl8a pt25b pt25a pt23a pt22b pt22a/tdqs22 pt21b pt20a pt21a pt20b pt19b/vref2_1 pt13b pt13a pt19a/vref1_1 pt18b pt18a pr2b/vref1_2 pr2a/vref2_2 pr7b pr7a pr8a pr8b pr9a/pclkt2_0 pr9b/pclkc2_0 pr13a/rlm0_pllt_in_a pr13b/rlm0_pllc_in_a pr14b/rlm0_pllc_fb_a pr15a/rdqs15 pr16a pr18a/vref1_3 pr16b pl9a/pclkt7_0 pr15b pt17b/pclkc0_0 pr11a/d7/spid0 pr11b/busy/sispi pr12b/di/csspi* 2 3 7 13 8 59 11 6 4 10 12 14 1 conn_14p 2 3 7 13 8 59 11 6 4 10 12 14 1 conn_14p v3_3 v3_3 downloaded from: http:///
end of processor hierarchy block mem_cs mem_sck mem_si mem_so 2.7v i26 reset_in 10k i28 i24 i10 l_tdo l_tdi l_tdi l_tdo l_tms l_tck v1_2 l_tck l_tms v1_2 .1uf .1uf .1uf 10uf 10uf 10uf 10k 10k 97_io 10k mem_sck 16/76(total) 5/5(block) 06/07/2006 steve scully ds33x42x82x162ee01a0 block name: _motprocrescard_dn. parent block: \_ds33x11d k_dn\ 36 1 52 28 63 12 11 128 117 109 72 80 37 144 15 96 98 97 14 24 44 13 92 17 91 89 90 94 136 93 95 143 110 125 108 38 71 73 18 16 99 19 54 126 10 84 55 u24 rb110 rb109 c126 cb333 cb338 cb336 cb330 cb335 1 9 5 7 3 4 26 10 8 j52 1 6 2 8 7 3 4 5 ub29 1 5 64 2 3 ub32 rb117 rb108 page: date: title: engineer: a a b b c c d d 1 1 2 2 3 3 4 4 5 5 6 6 7 7 88 v3_3 max1963 shdn* gnd rst* out ic in v3_3 at25160a_u si gnd wp* hold* vcc so sck cs* conn_10p 7 1 5 gnd 3 tck tms tdi vcc tdo v3_3 v3_3 control lfec_t144_u all low for spi3 mode needs 10k,1% resistor place close to pin vccio4a vccio3b xres vccaux2 vccaux1 vccj vcc3 tdi tdo vccio3a vccio4b vccio5a vccio2 vccio1b vccio1a vccio0b init* program* vccio0a cclk cfg1 cfg2 cfg0 tms vcc2 vcc1 vccio5b vccio6a tck done gnd10 gnd9 gnd8 gnd7/gnd0 gnd6b/gnd5 gnd3b gnd3a/gnd4 gnd2/gnd1 gnd1 gnd0 nc1 nc2 gnd4 gnd6a gnd5 vccio7 vccio6b v3_3 downloaded from: http:///
open drain reset 3.3v 1% regulator 3.3v 1% regulator trace geometry for this is: 1 inch long, 10 mil wide, 1 oz coppe r to ensure load sharing between the 3.3v 1% regulators be long enough to build 0.06 ohm of resistance traces between regulator output and v3.3 should 5v dc power supply reverse bias protection beginning / end of phy power supply hierarchy block regulator_input supply_output regulator1_output regulator2_output regulator_input regulator5_output supply_output regulator4_output regulator3_output regulator_input regulator_input supply_output reset_out 330 10uf 3.3v 3.3v 0.0 0.0 10uf 68uf 0.0 10uf 68uf 68uf 3.3v 10uf 0.0 68uf 10uf 0.0 3.3v 330 3.3v 68uf 10uf 10uf 10uf 10uf 1 amp green regulator_input regulator_input 17/76(total) 06/07/2006 1/1(block) ds33x42x82x162ee01a0 block name: power_supply_4amp_dn. parent block: \_ds33x1 1dk_dn\ steve scully 1 2 ds35 c101 c102 c103 c106 2 1 cb292 2 1 cb281 c109 15 6 7 13 5 4 2 17 10 11 14 12 3 ub23 rb88 rb87 rb89 c107 2 1 cb291 rb90 c105 15 6 7 13 5 4 2 17 10 11 14 12 3 ub25 15 6 7 13 5 4 2 17 10 11 14 12 3 ub24 2 1 cb279 c100 rb92 rb91 c108 2 1 cb290 15 6 7 13 5 4 2 17 10 11 14 12 3 ub27 15 6 7 13 5 4 2 17 10 11 14 12 3 ub26 2 1 db02 2 1 rb106 page: date: title: engineer: a a b b c c d d 1 1 2 2 3 3 4 4 5 5 6 6 7 7 88 max1793_u in2 out1 out3 set gnd gnd in1 in3 in4 out2 shdn rst out4 max1793_u in2 out1 out3 set gnd gnd in1 in3 in4 out2 shdn rst out4 max1793_u in2 out1 out3 set gnd gnd in1 in3 in4 out2 shdn rst out4 max1793_u in2 out1 out3 set gnd gnd in1 in3 in4 out2 shdn rst out4 max1793_u in2 out1 out3 set gnd gnd in1 in3 in4 out2 shdn rst out4 out in out downloaded from: http:///
testpoints connector (plug) connectors for lan motherboard to resource card beginning & end of phy connector + testpoint hierarchy block mdc mdc pt1_tx_en pt1_tx_clk 1 2 gmii_clkfrom_mac gmii_tx_er_ pt1_tx_en pt1_rxd<3..0> pt2_txd<3..0> gmii_clkfrom_mac spare osc25m i68 i67 pt1_rx_crs pt1_rx_err pt1_col_det pt1_rx_clk pt1_tx_clk pt1_tx_en pt1_txd<3..0> pt1_rxdv pt2_rxdv pt2_rxd<3..0> pt2_rx_crs pt2_rx_err pt2_col_det pt2_rx_clk pt2_tx_clk pt2_tx_en pt2_txd<3..0> pt1_rxd<3..0> gmii_tx_er_ gmii_clktomac_buf phy_int ref_clk gnd v3_3 0 1 2 3 0 1 0 1 2 3 2 3 0 1 2 3 pt2_rxd<3..0> pt1_rx_crs pt1_rx_clk phy_int pt1_col_det pt1_rxdv pt1_rx_err pt1_txd<3..0> gmii_tx_er_ gmii_clktomac_buf ref_clk gmii_clkfrom_mac pt2_rx_crs pt2_rx_clk pt2_rxdv pt2_tx_en pt2_tx_clk 1 2 3 0 3 2 1 0 3 3 2 1 0 pt1_txd<3..0> pt2_tx_en pt2_tx_clk pt1_rx_clk pt1_col_det pt1_rxdv pt1_rx_err pt1_rx_crs sfm-125-l2-s-d-lc na smt na_notpopulated smttp na i103 0 pt1_rxd<3..0> i78 pt2_rx_err pt2_col_det phy_int pt2_txd<3..0> ref_clk mdio mdio mdio mdc pt1_tx_clk pt2_rx_crs pt2_rxdv pt2_rxd<3..0> spare osc25m pt2_rx_clk pt2_col_det pt2_rx_err reset_b reset_b reset_b gmii_clktomac_buf spare 18/76(total) 06/07/2006 1/1(block) printed mon feb 11 14:00:23 2008 steve scully block name: _phy_imbus_mb_dn. parent block: \_DS33X11DK_ dn\ ds33x42x82x162ee01a0 39 7 5 11 17 15 23 25 27 31 33 35 37 41 43 45 47 49 16 18 26 28 30 32 34 36 38 40 44 46 48 50 29 24 20 42 14 10 3 22 21 13 4 19 2 1 8 6 12 9 jb04 39 7 5 11 17 15 23 25 27 31 33 35 37 41 43 45 47 49 16 18 26 28 30 32 34 36 38 40 44 46 48 50 29 24 20 42 14 10 3 22 21 13 4 19 2 1 8 6 12 9 jb05 page: date: title: engineer: a a b b c c d d 1 1 2 2 3 3 4 4 5 5 6 6 7 7 88 v2_5 io v3_3 v1_8 io 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 24 23 22 21 17 11 7 4 25 26 20 19 9 1 8 16 12 10 2 14 3 6 5 18 15 13 io io io io io io v3_3 io io io io io io io io io io io io io io io io v2_5 io v3_3 io v1_8 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 24 23 22 21 17 11 7 4 25 26 20 19 9 1 8 16 12 10 2 14 3 6 5 18 15 13 io io downloaded from: http:///
clkin pin86 mdc pin81 txerr pin61 gtxclk pin79 clktomac pin85 clkout pin87 txclk pin60 rxer pin41 crs pin40 col pin39 rxclk pin57 rxdv pin44 output rxd[0:7] [pin56:pin45] close to bg_ref place 9.76k res stipline to v2_5phy place mdi resistors close to phy maintain 50ohm txd[0:7] [pin76:pin65] txen pin62 input beginning of gigabit phy hierarchy block mac_clk_en_strap__tx_syn_clk multi_en_strap__tx_trigger link10led_speed1 a0_duplex mdic_n clkout_buf non_ieee_strap man_mdix_strap__tx_tclk rxdv_buf mdix_en_strap tx_clk rx_clk_buf tx_clk_buf rx_clk 30 rxd<7..0> 30 30 gmii_clkfrom_mac rx_clk_buf 3 4 rxd<7..0> v3_3 clktomac_buf mdib_n mdib_p phyosc25m clktomac_testpnt phyosc25m rx_err green tx_er_ gmii_clkfrom_mac mdia_p phy_int mdia_n mdc mdio mdid_n mdid_p mdic_p tx_er_ tx_en tx_clk_buf rx_crs_buf col_det_buf reset_b bg_ref mdc reset_b mdio ref_clk phy_int spare<4..1> tx_clk tx_en rxdv rx_crs 0 1 a0_duplex 2 3 45 6 7 txd<7..0> 0 1 25 6 7 gnd 2.0k 330 2.0k 9.76k 50 50 txd<7..0> clktomac 30 30 rx_err col_det rx_crs rxdv_buf rx_err_buf rx_crs_buf col_det_buf rxdv 30 clktomac clktomac_testpnt clkout_buf clkout clktomac_buf activityled_speed0 rx_err_buf 1k tx_er_ link100led_duplex 1k link1000led_anen col_det rx_clk 1/2(block) ds33x42x82x162ee01a0 steve scully 06/07/2006 19/76(total) printed mon feb 11 13:39:44 2008 . schematic on block name: _phy_dp83865bvh_dn. parent block: \_ds33x11d k_dn\ 92 90 96 123 98 100 34 102 33 32 31 28 24 27 39 40 60 75 76 71 72 68 67 66 65 62 79 61 57 55 52 56 51 50 47 46 45 41 44 87 114 120 121 126 127 86 80 81 109 3 108 115 85 18 17 88 95 1 7 13 14 89 10 9 8 6 94 128 u26 3 1 2 5 6 7 8 4 rpb90 3 1 2 5 6 7 8 4 rpb93 3 1 2 5 6 7 8 4 rpb98 3 1 2 5 6 7 8 4 rp38 3 1 2 5 6 7 8 4 rp34 3 1 2 5 6 7 8 4 rp36 3 1 2 5 6 7 8 4 rp32 3 1 2 5 6 7 8 4 rp31 rb119 1 2 ds41 3 1 2 5 6 7 8 4 rp40 rb126 rb124 3 1 2 5 6 7 8 4 rp39 rb125 tp01 page: date: title: engineer: a a b b c c d d 1 1 2 2 3 3 4 4 5 5 6 6 7 7 88 v3_3 io io io v3_3 io io io io io io io io io io io io in v2_5 v1_8 v2_5 v1_8 v3_3 io io io io dp83865_u vss<1..35> multi_en_strap/tx_trigger man_mdix_strap/tx_tclk link10_led/speed1_strap link100_led/duplex_strap link1000_led/an_en_strap mdix_en_strap phyaddr<1>_strap duplex_led/phyaddr<0>_strap activity_led/speed0_strap non_ieee_strap phyaddr<4>_strap mac_clk_en_strap/tx_syn_clk phyaddr<2>_strap phyaddr<3>_strap clk_to_mac mdib_n mdia_p interrupt* mdia_n mdc mdio clk_in mdid_n mdid_p mdic_n mdic_p mdib_p clk_out rx_dv/rck rx_er/rxdv_er rxd<7> rxd<6> rxd<5> rxd<4> rxd<3>/rx3 rxd<0>/rx0 rxd<2>/rx2 rxd<1>/rx1 rx_clk tx_er gtx_clk/tck tx_en/txen_er txd<7> txd<6> txd<5> txd<4> txd<2>/tx2 txd<3>/tx3 txd<0>/tx0 txd<1>/tx1 tx_clk/rgmii_sel0 crs/rgmii_sel1 col tms tck tdo tdi trst* reset* bg_ref vdd_sel_strap 1v8_avdd3 1v8_avdd2 1v8_avdd1_<1..5> 2v5_avdd<1..2> io_vdd<1..12> core_vdd<1..8> downloaded from: http:///
of mx.+- caps for decouple check that 2.2k res use the same rpack strap options here do not follow datasheet end of gigabit phy hierarchy block mdia_n mdid_p green default_capacitor_1pf_2_1 default_capacitor_1pf_2_1 default_capacitor_1pf_2_1 default_capacitor_1pf_2_1 l1000ob jmp_3 green jmp_3 green .01uf .01uf .01uf .01uf 4.7uf 4.7uf lactob mdic_n mdic_p mdia_p mdid_n mdib_n mdib_p l10ob jmp_3 l100ob green green green green green jmp_3 2.2k 2.2k 2.2k 2.2k 330 activityled_speed0 link10led_speed1 link100led_duplex link1000led_anen 2.0k jmp_3 2.2k jmp_3 jmp_3 jmp_3 jmp_3 non_ieee_strap mac_clk_en_strap__tx_syn_clk mdix_en_strap man_mdix_strap__tx_tclk multi_en_strap__tx_trigger .01uf ? .01uf ? .01uf ? .1uf ? .1uf ? .1uf ? .1uf ? ? .1uf ? .1uf ? .1uf ? .1uf ? .1uf ? 4.7uf ? 4.7uf ? 4.7uf ? .1uf ? .1uf ? .1uf ? .1uf ? 4.7uf ? 4.7uf ? 4.7uf ? 4.7uf ? 4.7uf ? 4.7uf ? 4.7uf ? 4.7uf ? 4.7uf ? 4.7uf ? 4.7uf ? 4.7uf ? ? .01uf ? .1uf ? .1uf ? 4.7uf ? 4.7uf ? 4.7uf ? 4.7uf 10k reset_b mdio phy_int .1uf ? .1uf printed mon feb 11 13:39:17 2008 ds33x42x82x162ee01a0 steve scully 06/07/2006 2/2(block) 20/76(total) . schematic on block name: _phy_dp83865bvh_dn. parent block: \_ds33x11d k_dn\ 1 3 2 jp27 1 3 2 jp26 1 3 2 jp24 1 3 2 jp23 1 2 ds42 1 2 ds46 cb381 1 2 ds47 1 2 ds43 1 2 ds45 1 2 ds48 1 2 ds49 1 2 ds44 cb448 1 3 2 jp19 1 3 2 jp18 cb402 1 3 2 jp17 1 3 2 jp16 1 3 2 jp25 cb359 cb399 cb352 3 1 2 5 6 7 8 4 rpb89 3 1 2 5 6 7 8 4 rpb88 rb129 3 1 2 5 6 7 8 4 rpb102 8 1 rpb106 7 2 rpb106 6 3 rpb106 5 4 rpb106 5 10 8 7 12 11 4 6 2 3 1 9 j2 page: date: title: engineer: a a b b c c d d 1 1 2 2 3 3 4 4 5 5 6 6 7 7 88 1000pf, 2kv mx3- mx3+ j8 j7 mx2- j5 j4 j6 j1 j2 mx0- mx0+ mx2+ j3 mx1- mx1+ 750 x4 cmr chokes 0.01 uf x4 conn_hfj11_1g02e_u vcc td0+ td1+ td0- td1- td2+ sh1 sh2 td3+ td3- gnd td2- v2_5 v2_5 v3_3 v3_3 v3_3 v3_3 v3_3 v3_3 v2_5 v1_8 v3_3 downloaded from: http:///
(ds3170 sct, transformers and connectors) beginning & end ds33x11 te3 wan block 330 1k 1k te3_tgclk te3_tsofo te3_rser te3_rgclk 30 t3mclk jtrst jtdo jtdi jtclk cs mode width t3_int reset_b te3_tser te3_rclki jtms te3_tclki rd wr t3mclk addr<10..0> 7 tref1 75 ohm 2p 44.736mhz_3.3v 8 4 02 3 56 0 51 1 2 3 6 7 51 332 51 te3_txp 1 red 5 4 dat<7..0> 30 te3_rsofo te3_txn rref1 75 ohm 2p 332 te3_rxn te3_rxp rb102 yb08 u20 rb93 t03 rb103 j44 t03 rb105 rb94 j45 ds36 rb112 21/76(total) steve scully 1/1(block) 06/07/2006 block name: _te3wan_dn. parent block: \_DS33X11DK_dn\ ds33x42x82x162ee01a0 2 1 1 8 4 5 c2 b2 c5 f4 e3 b7 j7 h3 g3 a3 j2 k2 k3 j4 g4 b3 e9 d9 e1 e2 f1 f2 a8 f10 f9 a4 c7 e10 d7 g9 b6 c9 c10 a9 b10 b9 c8 c6 a6 b8 f6 g5 d3 e6 b4 f5 d4 g7 f7 e7 e8 g1 d2 e4 b5 a2 a10 g10 k6 k1 c1 j1 d8 h2 f3 c3 a1 a5 c4 d5 e5 b1 d1 a7 g2 h1 d6 h10 g8 h8 h9 j10 j9 g6 j8 k8 h7 h6 k7 j6 k9 h5 j5 j3 f8 k5 k4 d10 k10 h4 28 27 6 5 1 2 26 25 8 7 1 2 1 2 3 1 2 5 6 7 8 4 rpb82 3 1 2 5 6 7 8 4 rpb83 3 1 2 5 6 7 8 4 rpb81 3 1 2 5 6 7 8 4 rpb84 page: date: title: engineer: a a b b c c d d 1 1 2 2 3 3 4 4 5 5 6 6 7 7 88 in v3_3 in out in in in in in in v3_3 v3_3 in g s out 2:1 g s 2:1 v3_3 out out ds3170_bga_u a<6> vdd4 vdd5 vdd3 a<0>/bswap rohsof a<4> d<0>/spi_miso a<8> d<1>/spi_mosi d<2>/spi_sclk d<4> d<3> d<6>/spi_cpha d<7>/spi_cpol d<8> d<9> d<10> d<11> d<13> d<12> d<15> d<14> nc refclk clko vdd6 vdd2 vdd1 jtrst* jtdo jtdi jtclk cs* spi mode width int* rdy* vss1 vss2 vss3 vss4 vss5 vss6 avssr avsst avssj avssc gpio<1> gpio<2> gpio<3> gpio<4> gpio<8> test* hiz* rst* gpio<7> gpio<6> gpio<5> rsofo/rden rclko/rgclk rser tsofo/tden tclko/tgclk tser tsofi tclki rohclk roh tohsof tohclk tohen toh rxp rneg/rlcv rpos/rdat rlclk txn2 txn1 txp2 txp1 tneg tpos/tdat jtms ale a<7> a<5> a<2> a<1> rxn avddc a<3> d<5>/spi_swap tlclk avddj avddt avddr rd*/ds* wr*/rw in io in vcc 1 osc gnd out v3_3 out out in out downloaded from: http:///
int_led and testpoints for addr/data/ctrl are in the micro processor block beginning of ds26521dk hierarchy block spisel521 rlf_ltc521 txenable521 bts521 330 pb_rchclk521 rser521 rsync521 tsync521 rchclk521 pb_rsync521 pb_rser521 pb_tsync521 30 d_dut<7..0> tchclk521 30 12 8 7 6 5 4 3 2 1 0 7 6 24 5 0 3 1 a_dut<12..0> 30 pb_tchclk521 refclkio521 rtip pb_rchclk521 bpclk521 bts521 spisel521 jtrst jtms jtclk jtdi jtdo scanen521 scanmo521 refclkio521 rd_dut wr_dut cs_x3 int521 mclk521 reset521 txenable521 al_rsigf_flos521 pb_rsync521 rsysclk521 rlf_ltc521 rm_rfsync521 rsig521 pb_rser521 rclk521 rring pb_tsync521 tsig521 pb_tchclk521 tssyncio521 tsysclk521 tclk521 tring ttip tser521 rm_rfsync521 rsig521 tsig521 tser521 tclk521 tsysclk521 tssyncio521 tser521 refclkio521 1k scanen521 scanmo521 rsysclk521 al_rsigf_flos521 u21 ds37 rb120 rb113 j53 1/2(block) block name: _ds26521dk01a0dutdn_. parent block: \_ds33x1 1dk_dn\ 06/07/2006 steve scully 22/76(total) ds33x42x82x162ee01a0 1 2 ds38 9 10 20 49 48 33 2 26 1 47 46 45 44 43 4 3 8 12 41 22 21 40 42 5 35 36 34 37 39 38 13 27 30 51 54 55 29 28 31 32 50 53 52 57 56 11 61 14 15 18 17 16 19 23 24 25 59 58 60 62 64 63 7 6 3 1 2 5 6 7 8 4 rpb87 3 1 2 5 6 7 8 4 rpb86 3 1 2 5 6 7 8 4 rpb85 6 5 4 9 7 3 10 8 1 2 page: date: title: engineer: a a b b c c d d 1 1 2 2 3 3 4 4 5 5 6 6 7 7 88 v3_3 6 10 8 4 1 2 3 5 7 9 conn_10p out in out out out out out in in in in ds26521_u ttip tring tclk tser tsysclk tssyncio tchblk/clk tsig a<0> a<1> a<2> a<4> a<7> a<6> a<5> a<8> a<12> tsync rring rclk rser rsig rm/rfsync rlf/ltc d<1>/spi_mosi d<2>/spi_clk d<5>/spi_swap d<4> rsysclk rsync al/rsigf/flos d<3> d<6>/spi_cpha txenable reset* mclk int* cs* wr/rw* rd/ds* atvdd refclkio acvdd dvdd dvss acvss arvss atvss scan_mode scan_enable jtdo jtdi jtclk jtms jtrst spi_sel d<7>/spi_cpol bts d<0>/spi_miso bpclk rchblk/clk a<3> rtip arvdd v3_3 in in in in in io in downloaded from: http:///
end of ds26521dk hierarchy block tring ttip mclk521prebuf mclk521 1.544mhz_3.3v 2.048mhz_3.3v jmp_3 30 .1uf 560pf 61.9 61.9 rtip rring j47 r37 r38 c121 c116 rb123 jp21 yb13 yb12 tb05 tb05 23/76(total) ds33x42x82x162ee01a0 steve scully 06/07/2006 2/2(block) block name: _ds26521dk01a0dutdn_. parent block: \_ds33x1 1dk_dn\ 2 1 2 1 1 2 1 3 2 1 8 4 5 1 8 4 5 7 8 9 6 5 4 10 11 12 3 2 1 1 4 7 2 3 6 8 5 page: date: title: engineer: a a b b c c d d 1 1 2 2 3 3 4 4 5 5 6 6 7 7 88 conn_rj48 e h f c b g d a 1:1 1:2 vcc 1 osc gnd out vcc 1 osc gnd out v3_3 v3_3 downloaded from: http:///

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